고해상도 AC PDP를 위한 새로운 구동방식

조영완,권오경,Cho, Young-Wan,Kwon, Oh-Kyong 대한전자공학회 2001 電子工學會論文誌-SC (System and control) Vol.38 No.4

본 논문에서는 HDTV급 이상의 고해상도 AC PDP를 구동할 수 있는 새로운 구동방식을 제안하였다. 제안한 구동방식은 유지방전 펄스의 상승부와 하강부를 어드레스 방전에 이용하여 0.85${\mu}s$의 데이터 펄스 및 스캔 펄스 쪽으로 어드레스 방전이 가능하고 위상차이가 있는 유지방전 펄스를 인가하여 어드레스 방전의 횟수를 증가시켜 고해상도의 AC PDP패널을 고휘도로 구동할 수 있다. 유지 방전 주파수가 125kHz이고 4개의 위상차이를 줄 경우 최대 2080 수평해상도의 패널을 구동 할 수 있다. 이를 확인하기 위해 $30{\times}58$ 해상도의 4인치 칼라 AC PDP를 제한한 구동방식으로 구동하였으며 전압이 140V이고 주파수가 125kHz인 유지방전 펄스로 화면 잡음 없이 850 $cd/m^2$의 고휘도를 구현하였다. We have proposed a new driving method of AC PDP for both high resolution over HDTV and high luminance. The new driving method can reduce data and scan pulse width to 0.85${\mu}s$ by utilizing both rising and falling edges of sustain pulse and can provide high resolution AC PDP with high luminance by increasing the number of addressing discharge using sustain pulses with phase shifts. As a result, the proposed driving scheme makes it possible to drive 2080 horizontal resolution panel with high luminance. The experimental results using 4-inch color AC PDP with $30{\times}58$ pixels indicate that the luminance can achieved up to 850 $cd/m^2$ without image noise when we employ the four phase shifted sustain pulses with the amplitude of 140V and the frequency of 125KHz.

거주자의 문화를 통해 본 강화도 최소중정형 튼입구자집($\sqcap$형 평면)의 해석

이희봉,권오경,Lee, Hee-Bong,Kwon, Oh-Kyong 한국건축역사학회 2004 건축역사연구 Vol.13 No.4

The purpose of this study is to understand underlying principle to form the U-type folk house in the northwestern part of Kangwha Island by viewpoint of inner residents. It is found that many factors other than climate are coincidentally affecting the shape of house; Resident's fixed thought like following geomancer' suggestion, seeking fortune, and locating house enclosed low site; Economic reason of uniting one house with two buildings and making small type by used timber from dismantled house; Centralizing life with small courtyard by reason of family type change from extended to nuclear; Influence from L or ㅁ type of upper class building at Seoul area. The method is thick description of culture with ethnographic method from cognitive anthropology: Observing the form and restoring residents' life with open-ended deep interview.

5'' True Color FED 구동시스템 설계

신홍재,권오경,곽계달,Shin, Hong-Jae,Kwon, Oh-Kyong,Kwack, Kae-Dal 대한전자공학회 2001 電子工學會論文誌-SC (System and control) Vol.38 No.5

본 연구에서는 전류제어 효과를 갖는 전압제어 펄스폭 변조 방식의 5' true color FED 구동시스템을 설계하였다. 제안한 구동방식은 전압제어 펄스폭 변조방식과 전류제어 방식의 장점을 가지고 있다. 또한, FED 구동회로의 시뮬레이션을 위하여 FED 서브 픽셀에 대한 새로운 회로 모델을 제안한다. 제안된 모델은 FED 서브 픽셀의 특성과 FED 패널의 기생 효과인 게이트 라인간 커플링 현상과 인접한 캐소드 라인을 통하여 흐르는 누설 전류 등을 고려하고 있다. FED 구동회로의 출력단은 제안된 모델을 사용하여 최적화되었다. R.G.B 입력데이터 신호 처리를 병렬처리 방식으로 하여 기존의 직렬처리 방식에 비해서 화면에 영상을 디스플레이하는 duty ratio를 최대로 하여 휘도를 높일 수 있도록 하였다. 이러한 연구 결과를 바탕으로 $300{\times}224$의 해상도를 가지는 5' true color FED를 성공적으로 디스플레이 하였다. We have developed a novel driving system of 5' true color FED using voltage controlled PWM method which has current control effect. The proposed method has the advantage of voltage controlled pulse width modulation method and current control method. Also, we propose a new circuit model of FED subpixel for circuit simulation of FED driving circuits, considering some parasitic effects, i.e., cross talk, line coupling effect and leakage current to the adjacent cathode lines. Output stage of the data driving circuit is optimized using the proposed circuit model. In video data processing, FED controller uses the parallel processing of R.G.B input data, so duty ratio is maximized and brightness of FED increases. With this results, no noise and high quality performance is achieved in display of 5' true color FED.

동적 시준을 이용한 CT 촬영과 볼록한 관심영역의 영상재구성

진승오,권오경,Jin, Seung Oh,Kwon, Oh-Kyong 대한의용생체공학회 2014 의공학회지 Vol.35 No.5

Computed tomography (CT) is one of the most widely used medical imaging modality. However, substantial x-ray dose exposed to the human subject during the CT scan is a great concern. Region-of-interest (ROI) CT is considered to be a possible solution for its potential to reduce the x-ray dose to the human subject. In most of ROI-CT scans, the ROI is set to a circular shape whose diameter is often considerably smaller than the full field-of-view (FOV). However, an arbitrarily shaped ROI is very desirable to reduce the x-ray dose more than the circularly shaped ROI can do. We propose a new method to make a non-circular convex-shaped ROI along with the image reconstruction method. To make a ROI with an arbitrary convex shape, dynamic collimations are necessary to minimize the x-ray dose at each angle of view. In addition to the dynamic collimation, we get the ROI projection data with slightly lower sampling rate in the view direction to further reduce the x-ray dose. We reconstruct images from the ROI projection data in the compressed sensing (CS) framework assisted by the exterior projection data acquired from the pilot scan to set the ROI. To validate the proposed method, we used the experimental micro-CT projection data after truncating them to simulate the dynamic collimation. The reconstructed ROI images showed little errors as compared to the images reconstructed from the full-FOV scan data as well as little artifacts inside the ROI. We expect the proposed method can significantly reduce the x-ray dose in CT scans if the dynamic collimation is realized in real CT machines.

Exterior 투영데이터를 이용한 Region-of-Interest CT의 반복적 영상재구성 방법

진승오,권오경,Jin, Seung Oh,Kwon, Oh-Kyong 대한의용생체공학회 2014 의공학회지 Vol.35 No.5

In an ordinary CT scan, a large number of projections with full field-of-view (FFOV) are necessary to reconstruct high resolution images. However, excessive x-ray dosage is a great concern in FFOV scan. Region-of-interest (ROI) CT or sparse-view CT is considered to be a solution to reduce x-ray dosage in CT scanning, but it suffers from bright-band artifacts or streak artifacts giving contrast anomaly in the reconstructed image. In this study, we propose an image reconstruction method to eliminate the bright-band artifacts and the streak artifacts simultaneously. In addition to the ROI scan for the interior projection data with relatively high sampling rate in the view direction, we get sparse-view exterior projection data with much lower sampling rate. Then, we reconstruct images by solving a constrained total variation (TV) minimization problem for the interior projection data, which is assisted by the exterior projection data in the compressed sensing (CS) framework. For the interior image reconstruction assisted by the exterior projection data, we implemented the proposed method which enforces dual data fidelity terms and a TV term. The proposed method has effectively suppressed the bright-band artifacts around the ROI boundary and the streak artifacts in the ROI image. We expect the proposed method can be used for low-dose CT scans based on limited x-ray exposure to a small ROI in the human body.

CTR 코드를 사용한 I/O 핀 수를 감소 시킬 수 있는 인터페이스 회로

김준배,권오경,Kim, Jun-Bae,Kwon, Oh-Kyong 대한전자공학회 1999 電子工學會論文誌, D Vol.d36 No.1

반도체 칩의 집적도가 급격히 향상됨에 따라 칩의 I/O 수가 증ㅇ가하여 패키지의 크기가 커질 뿐 아니라 칩 자체의 가격보다 패키지의 가격이 높아지고 있는 실정이다. 따라서 집적도의 증가에 의한 I/O 수으이 증가를 억제할 수있는 방법이 요구되고 있다. 본 논문에서는 CTR(Constant-Transition-Rate) 코드 심벌 펄스의 상승 예지와 하강 예지의 위치에 따라 각각 2비트 씩의 디지털 데이터를 엔코딩함으로써 I/O 핀 수를 50% 감소 시킬 수 있는 I/O 인터페이스 회로를 제안한다. 제안한 CTR 코드의 한 심벌은 4비트 데이터를 포함하고 있어 기존의 인터페이스 회로와 비교하여 심벌 속도가 절반으로 감소되고, 엔코딩 신호의 단위 시간당 천이 수가 일정하며, 천이 위치가 넓게 분산되어 동시 스위칭 잡음(Simultaneous Switehing Noise, SSN)이 작아진다. 채널 엔코더는 논리 회로만으로 구현하고, 채널 디코더는 오버샘플링(oversampling) 기법을 이용하여 신호를 복원하는 입출력 회로를 설계하였다. 설계한 회로는 0.6${\mu}m$ CMOS SPICE 파라미터를 이용하여 시뮬레이션함으로써 동작을 검증하였으며, 동작 속도는 200 Mbps/pin 이상이 됨을 확인 하였다. 제안한 방식을 Altera사의 FPGA를 이용하여 구성하였으며, 구성한 회로는 핀 당 22.5 Mbps로 데이터를 전송함을 실험적으로 검증하였다. As the density of logic gates of VLSI chips has rapidly increased, more number of I/O pins has been required. This results in bigger package size and higher packager cost. The package cost is higher than the cost of bare chips for high I/O count VLSI chips. As the density of logic gates increases, the reduction method of the number of I/O pins for a given complexity of logic gates is required. In this paper, we propose the novel I/O interface circuit using CTR (Constant-Transition-Rate) code to reduce 50% of the number of I/O pins. The rising and falling edges of the symbol pulse of CTR codes contain 2-bit digital data, respectively. Since each symbol of the proposed CTR codes contains 4-bit digital data, the symbol rate can be reduced by the factor of 2 compared with the conventional I/O interface circuit. Also, the simultaneous switching noise(SSN) can be reduced because the transition rate is constant and the transition point of the symbols is widely distributed. The channel encoder is implemented only logic circuits and the circuit of the channel decoder is designed using the over-sampling method. The proper operation of the designed I/O interface circuit was verified using. HSPICE simulation with 0.6 m CMOS SPICE parameters. The simulation results indicate that the data transmission rate of the proposed circuit using 0.6 m CMOS technology is more than 200 Mbps/pin. We implemented the proposed circuit using Altera's FPGA and confimed the operation with the data transfer rate of 22.5 Mbps/pin.

공핍 모드 InGaZnO 박막 트랜지스터를 이용한 저소비전력 스캔 구동 회로

이진우(Jin-woo Lee),권오경(Oh-kyong Kwon) 大韓電子工學會 2012 電子工學會論文誌-SD (Semiconductor and devices) Vol.49 No.2

A low power consumption scan driver using depletion-mode n-type InGaZnO thin-film transistors is proposed. The proposed circuit uses 2 clock signals and generates the non-overlap output signals without the additional masking signals and circuits. The power consumption of the proposed circuit is decreased by reducing the number of the clock signals and short circuit current. The simulation results show that the proposed circuit operates successfully when the threshold voltage of TFT is varied from -3.0V to 1.0V. The proposed scan driver consumes 4.89mW when the positive and negative supply voltage is 15V and -5V, respectively, and the operating frequency is 46KHz on the XGA resolution panel.

패킷 방식의 DRAM에 적용하기 위한 새로운 강조 구동회로

金俊倍(Jun-Bae Kim),權五敬(Oh-Kyong Kwon) 대한전기학회 2001 전기학회논문지C Vol.50 No.4

표준 CMOS 게이트 산화막 안티퓨즈를 이용한 새로운 OTP 단위 비트와 ROM 설계

신창희(Chang-Hee Shin),권오경(Oh-Kyong Kwon) 대한전자공학회 2009 電子工學會論文誌-SD (Semiconductor and devices) Vol.46 No.5

표준 CMOS 공정을 이용한 CMOS 게이트 산화막 안티퓨즈의 새로운 OTP 단위 비트 구조를 제안하였다. 제안된 OTP 단위 비트는 NMOS 게이트 산화막 안티퓨즈를 포함한 3개의 트랜지스터와 인버터 타입 자체 센스 엠프를 포함하고 있다. 그럼에도 불구하고, 레이아웃 면적은 기존 구조와 비슷한 22㎛²이다. 또한, 제안된 OTP 단위 비트는 구조적 특징상 고전압 차단 스위치 트랜지스터와 저항과 같은 고전압 차단 요소를 사용하지 않기 때문에, 프로그램 시간은 기존 구조보다 개선된 3.6msec이다. 그리고 제안된 OTP 단위 비트를 포함하는 OTP array는 센스 엠프가 단위 비트마다 집적되어 있기 때문에 기존 OTP array에서 사용된 센스 엠프와 바이어스 생성 회로가 필요 없다. In this paper, we proposed a novel OTP unit bit of CMOS gate oxide antifuse using the standard CMOS process without additional process. The proposed OTP unit bit is composed of 3 transistors including an NMOS gate oxide antifuse and a sense amplifier of inverter type. The layout area of the proposed OTP unit bit is 22㎛² similar to a conventional OTP unit bit. The programming time of the proposed OTP unit bit is 3.6msec that is improved than that of the conventional OTP unit bit because it doesn't use high voltage blocking elements such as high voltage blocking switch transistor and resistor. And the OTP array with the proposed OTP unit bit doesn't need sense amplifier and bias generation circuit that are used in a conventional OTP array because sense amplifier of inverter type is included to the proposed OTP unit bit.

1.2 Gbps 신호 복원기를 위한 비동기 비교기의 설계

임병찬(Byong-Chan Lim),권오경(Oh-Kyong Kwon) 대한전자공학회 2001 대한전자공학회 학술대회 Vol.2001 No.6