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Development of a Switched Diode Asymmetric Multilevel Inverter Topology
D. Karthikeyan,Vijayakumar Krishnasamy,Mohd. Ali Jagabar Sathik 전력전자학회 2018 JOURNAL OF POWER ELECTRONICS Vol.18 No.2
This paper presents a new asymmetrical multilevel inverter with a reduced number of power electronic components. The proposed multilevel inverter is analyzed using two different configurations: i) First Configuration (with a switched diode) and ii) Second Configuration (without a switched diode). The presented topologies are compared with recent multilevel inverter topologies in terms of number of switches, gate driver circuits and blocking voltages. The proposed topologies can be cascaded to generate the maximum number of output voltage levels and they are suitable for high voltage applications. Various power quality issues are addressed for both of the configurations. The proposed 11-level inverter configuration is simulated using MATLAB and it is validated with a laboratory based experimental setup.
Development of a Switched Diode Asymmetric Multilevel Inverter Topology
Karthikeyan, D.,Krishnasamy, Vijayakumar,Sathik, Mohd. Ali Jagabar The Korean Institute of Power Electronics 2018 JOURNAL OF POWER ELECTRONICS Vol.18 No.2
This paper presents a new asymmetrical multilevel inverter with a reduced number of power electronic components. The proposed multilevel inverter is analyzed using two different configurations: i) First Configuration (with a switched diode) and ii) Second Configuration (without a switched diode). The presented topologies are compared with recent multilevel inverter topologies in terms of number of switches, gate driver circuits and blocking voltages. The proposed topologies can be cascaded to generate the maximum number of output voltage levels and they are suitable for high voltage applications. Various power quality issues are addressed for both of the configurations. The proposed 11-level inverter configuration is simulated using MATLAB and it is validated with a laboratory based experimental setup.