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RISS 인기검색어
- 검색키워드
- 저자 : Salleo, Alberto (검색결과 3 건)
- 무료
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Structural and Electrical Investigation of C<sub>60</sub>–Graphene Vertical Heterostructures
Kim, Kwanpyo,Lee, Tae Hoon,Santos, Elton J. G.,Jo, Pil Sung,Salleo, Alberto,Nishi, Yoshio,Bao, Zhenan American Chemical Society 2015 ACS NANO Vol.9 No.6
<P>Graphene, with its unique electronic and structural qualities, has become an important playground for studying adsorption and assembly of various materials including organic molecules. Moreover, organic/graphene vertical structures assembled by van der Waals interaction have potential for multifunctional device applications. Here, we investigate structural and electrical properties of vertical heterostructures composed of C<SUB>60</SUB> thin film on graphene. The assembled film structure of C<SUB>60</SUB> on graphene is investigated using transmission electron microscopy, which reveals a uniform morphology of C<SUB>60</SUB> film on graphene with a grain size as large as 500 nm. The strong epitaxial relations between C<SUB>60</SUB> crystal and graphene lattice directions are found, and van der Waals <I>ab initio</I> calculations support the observed phenomena. Moreover, using C<SUB>60</SUB>–graphene heterostructures, we fabricate vertical graphene transistors incorporating n-type organic semiconducting materials with an on/off ratio above 3 × 10<SUP>3</SUP>. Our work demonstrates that graphene can serve as an excellent substrate for assembly of molecules, and attained organic/graphene heterostructures have great potential for electronics applications.</P><P><B>Graphic Abstract</B> <IMG SRC='http://pubs.acs.org/appl/literatum/publisher/achs/journals/content/ancac3/2015/ancac3.2015.9.issue-6/acsnano.5b00581/production/images/medium/nn-2015-00581y_0005.gif'></P><P><A href='http://pubs.acs.org/doi/suppl/10.1021/nn5b00581'>ACS Electronic Supporting Info</A></P>
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High-Throughput Open-Air Plasma Activation of Metal-Oxide Thin Films with Low Thermal Budget
Tak, Young Jun,Hilt, Florian,Keene, Scott,Kim, Won-Gi,Dauskardt, Reinhold H.,Salleo, Alberto,Kim, Hyun Jae American Chemical Society 2018 ACS APPLIED MATERIALS & INTERFACES Vol.10 No.43
<P>Sputter-processed oxide films are typically annealed at high temperature (activation process) to achieve stable electrical characteristics through the formation of strong metal-oxide chemical bonds. For instance, indium-gallium-zinc oxide (IGZO) films typically need a thermal treatment at 300 °C for ≥1 h as an activation process. We propose an open-air plasma treatment (OPT) to rapidly and effectively activate sputter-processed IGZO films. The OPT effectively induces metal-oxide chemical bonds in IGZO films at temperatures as low as 240 °C, with a dwell time on the order of a second. Furthermore, by controlling the plasma-processing conditions (scan speed, distance <I>a</I> between plasma nozzle and samples, and gas flow rate), the electrical characteristics and the microstructure of the IGZO films can be easily tuned. Finally, OPT can be utilized to implement a selective activation process. Plasma-treated IGZO thin-film transistors (TFTs) exhibit comparable electrical characteristics to those of conventionally thermal treated IGZO TFTs. Through in-depth optical, chemical, and physical characterizations, we confirm that OPT simultaneously dissociates weak chemical bonds by UV radiation and ion bombardment and re-establishes the metal-oxide network by radical reaction and OPT-induced heat.</P> [FIG OMISSION]</BR>
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Printed Polymer and a-Si TFT Backplanes for Flexible Displays
Street, R.A.,Wong, W.S.,Ready, S.E.,Chabinyc, M.L.,Arias, A.C.,Daniel, J.H.,Apte, R.B.,Salleo, A.,Lujan, R.,Ong, Beng,Wu, Yiliang The Korean Infomation Display Society 2005 Journal of information display Vol.6 No.3
The need for low cost, flexible, thin film transistor (TFT) display backplanes has focused attention on new processing techniques and materials. We report the development of TFT backplane technology based entirely on jet-printing, using a combination of additive and subtractive processing, to print active materials or etch masks. The technique eliminates the use of photolithography and has the potential to reduce the array manufacturing cost. The printing technique is demonstrated with both amorphous silicon and polymer semiconductor TFT arrays, and we show results of small prototype displays.
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