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- 저자 : Qinglei Bu (검색결과 2 건)
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Optimized Transient Modulation Control of Bidirectional Full-Bridge DC-DC Converter
Qinglei Bu,Huiqing Wen,Jiacheng Wen 전력전자학회 2019 ICPE(ISPE)논문집 Vol.2019 No.5
To eliminate the dc-bias current in the transient-state (TS) of the dual-active-bridge (DAB) DC-DC converter with the load change demand, this paper proposed an optimized transient modulation (OTM) control strategy under triplephase-shift (TPS) control for transient response. Compared with the traditional optimized algorithm in TS, a fixed switching state is applied to increase the transition speed and simplify the complexity of calculations. Because of the fixed switching state, the gradient of the inductor current is modified to the maximum value rather than piecewise linear relationship within the transient period, which shorten the settling time significantly. Besides, compared with the dedicated method for specific phaseshift control of traditional optimization, OTM control is not only suitable for TPS control, but can be utilized for other phaseshift control easily as well, such as extended-phase-shift (EPS) and single-phase-shift (SPS). Finally, the experimental results are given to verify the proposed OTM methods.
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Miao Cui,Qinglei Bu,Yutao Cai,Ruize Sun,Wen Liu,Huiqing Wen,Sang Lam,Yung. C. Liang,Ivona Z. Mitrovic,Stephen Taylor,Paul R. Chalker,Cezhou Zhao 전력전자학회 2019 ICPE(ISPE)논문집 Vol.2019 No.5
This study proposed a 100 kHz, 5V/11V boost converter with an integrated gate driver for a power switching device using recessed E-mode MIS-HFETs. The integrated gate driver consisting of multi-stages DCFL (Direct-Coupled FET Logic) inverters and a buffer stage, has large input swing (up to 10 V) and wide noise margin with gate dielectric, which benefits applications requiring large gate swing without any additional drivers or level shifters. The impact of transistor size on rise times and fall times have been studied. Either buffer stage or larger width of DCFL inverter can reduce rise times from 2.4 μs to less than 0.5 μs at 100 kHz, so the output voltage of boost converter is increased by 10 % at a duty cycle of 0.7. However, large buffer width can result in high gate overshoot and oscillation, indicating careful design to balance switching speed and oscillation.
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