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RISS 인기검색어
- 검색키워드
- 저자 : Nithin Raj (검색결과 4 건)
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A Modified Charge Balancing Scheme for Cascaded H-Bridge Multilevel Inverter
Raj, Nithin,G, Jagadanand,George, Saly The Korean Institute of Power Electronics 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.6
Cascaded H-bridge multilevel inverters are currently used because it enables the integration of various sources, such as batteries, ultracapacitors, photovoltaic array and fuel cells in a single system. Conventional modulation schemes for multilevel inverters have concentrated mainly on the generation of a low harmonic output voltage, which results in less effective utilization of connected sources. Less effective utilization leads to a difference in the charging/discharging of sources, causing unsteady voltages over a long period of operation and a reduction in the lifetime of the sources. Hence, a charge balance control scheme has to be incorporated along with the modulation scheme to overcome these issues. In this paper, a new approach for charge balancing in symmetric cascaded H-bridge multilevel inverter that enables almost 100% charge balancing of sources is presented. The proposed method achieves charge balancing without any additional stages or complex circuit or considerable computational requirement. The validity of the proposed method is verified through simulation and experiments.
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A Modified Charge Balancing Scheme for Cascaded H-Bridge Multilevel Inverter
Nithin Raj,Jagadanand G,Saly George 전력전자학회 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.6
Cascaded H-bridge multilevel inverters are currently used because it enables the integration of various sources, such as batteries, ultracapacitors, photovoltaic array and fuel cells in a single system. Conventional modulation schemes for multilevel inverters have concentrated mainly on the generation of a low harmonic output voltage, which results in less effective utilization of connected sources. Less effective utilization leads to a difference in the charging/discharging of sources, causing unsteady voltages over a long period of operation and a reduction in the lifetime of the sources. Hence, a charge balance control scheme has to be incorporated along with the modulation scheme to overcome these issues. In this paper, a new approach for charge balancing in symmetric cascaded H-bridge multilevel inverter that enables almost 100% charge balancing of sources is presented. The proposed method achieves charge balancing without any additional stages or complex circuit or considerable computational requirement. The validity of the proposed method is verified through simulation and experiments.
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A Study on the Evolution of Solid State Transformer Technologies and Applications
Nithin Kolli,Sanket Parashar,Raj Kumar Kokkonda,Apoorv Agarwal,Anup Anurag,Subhashish Bhattacharya 전력전자학회 2023 ICPE(ISPE)논문집 Vol.2023 No.-
The advancements in power electronics have enabled the building of solid-state transformers (SSTs) to meet the demands of smart grids. An SST is an AC/AC solid-state power conversion system. Typically these SSTs can be classified based on various parameters like series/parallel interconnection, number of power conversion stages, degree of phase modularity, etc. This paper presents a survey of the work carried out to date on SSTs with multi-stage power conversion. Furthermore, the paper highlights the SSTs that enable medium voltage grid interconnection, which is enabled by high voltage (HV) SiC power devices. The design, control, development, and testing of SST with HV SiC 10 kV MOSFETs and 15 kV SiC IGBTs are presented, and a pilot demonstration for the Navy of a medium voltage (MV) 4160 V, 100 kVA SST for “Mobile Utility Support Equipment (MUSE)” based applications enabled by SiC 10 kV MOSFETs will be discussed. A Medium-Voltage Asynchronous Microgrid Power Conditioning System (Microgrid PCS), or MV-MV SST, enabled by HV SiC series-connected power devices to connect, disconnect, and enable power flow between asynchronously connected microgrids and grids is presented. The paper addresses the developed SST prototypes and provides analysis based on the related applications. The analysis also discusses the challenges and future trends regarding the implementation of SST.
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Sanket Parashar,Nithin Kolli,Raj Kumar Kokkonda,Subhashish Bhattacharya 전력전자학회 2023 ICPE(ISPE)논문집 Vol.2023 No.-
This research article presents a thorough investigation of the 3 Level - 3 Phase (3L-3P) Neutral Point Clamped (NPC) Dual Active Bridge (DAB) topology for designing Medium Voltage (MV) DC isolators. An equivalent circuit model is utilized to provide a detailed analysis of the switching transition at specific operating points, including α = 60° , 0 < φ < 90° (φ≠ 60° ) α = 60°, φ = 60°. These operating points not only ensure optimal performance but also minimize the Common Mode (CM) current injected into the operating environment. The article also employs the model to evaluate the minimum current required for Zero Voltage Switching (ZVS) operation, snubber current during turn transition, and the loss in the snubber resistor. Furthermore, the article proposes a dynamic voltage balancing algorithm that significantly reduces DC offset by 80% and switching losses by 50% through precise turn-off Vds mismatch across MOSFETs and Diodes within a specified limit of 100V. The accuracy of the model used in the proposed algorithm is validated through experimental turn-off waveforms of SiC MOSFET at 1.75kV. The article introduces experimental test benches to examine the impact of base plate capacitance (Cbs) on the voltage mismatch and snubber losses in the 3L pole, providing valuable insights into the behavior of the topology under various conditions. The experiments are conducted up to 6kV DC bus voltage, and the snubber loss and dynamic voltage mismatch across series connected MOSFETs and diodes are evaluated and validated through the theoretical model.
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