Self-biased Super MOS 복합회로를 응용한 공정검출회로 = A Process Detection Circuit using Self-biased Super MOS composit circuit

다국어 초록 (Multilingual Abstract)

A new process detection circuit is proposed. The proposed process detection circuit compares a long channel MOS TR (L > 0.4um) to a short channel MOS TR which uses lowest feature size of the process. The circuit generates the differential current proportional to the deviation of carrier mobilities according to the process variation. This method keep the two TR's drain voltage same by implementing the feedback using a high gain OPAMP. This paper also shows the new design of the simple high gain self-biased rail-to-rail OPAMP using a proposed self-biased super MOS composite circuit. The gain of designed OPAMP is measured over 100dB with 0.2~1.6V wide range CMR in single stage. Finally, the proposed process detection circuit is applied to a differential VCO. The VCO showed that the proposed process detection circuit compensates the process corners successfully and ensures the wide rage operation.