Internet application programs need the capability of encryption for security. Messages and other data are encrypted and decrypted by using keys, which are generated by random number generators. We have shown that some bits taken the difference between...
Internet application programs need the capability of encryption for security. Messages and other data are encrypted and decrypted by using keys, which are generated by random number generators. We have shown that some bits taken the difference between two consecutive readings of microprocessors' counter registers are truly random, where the counter registers increase at the speed of system clock. Our hypothesis is confirmed by using the NIST's test package for random number generators. We tested TSC MSR (Time-Stamp Counter Model-Specific Register) in the Pentium processor. Our result implies that TSC MSR can be used as an internal chaotic source for true random number generation with high performance.