In this paper, the Split Access Bus, a single shared bus for multimicroprocessor, was suggested, designed and experimented. And it's performance was analyzed.
In the Split Access Bus, the transfer of shared memory requert was splitted up with the tr...
In this paper, the Split Access Bus, a single shared bus for multimicroprocessor, was suggested, designed and experimented. And it's performance was analyzed.
In the Split Access Bus, the transfer of shared memory requert was splitted up with the transfer of read datum. The exclusive bus time for each access was shortened by far, compared to memory access time. As a result, through single shared bus, multiple processing elements could access multiple memory modules during single memory cycle.
Results of analysis showed the fact that a single shared bus multimicroprocessor of about fifty processing elements can be constructed without signifficant performance degradation.