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1.1 V full-swing double bootstrapped BiCMOS logic gates
Seng, Y. K Institution of Electrical Engineers 1996 p.p41-45
Amplifier linearisation through the use of special negative linear feedback
Villanueva, R. G Institution of Electrical Engineers 1996 p.p61-67
Senani, R Institution of Electrical Engineers 1996 p.p71
Sheu, H.-T Institution of Electrical Engineers 1996 p.p53-60
Issues in the design of a logic simulator: Element modelling for efficiency
Brown, A. D Institution of Electrical Engineers 1996 p.p21-27
Modelling of the quasisaturation behaviour in the high-voltage MOSFET with vertical trench gate
Zeng, J Institution of Electrical Engineers 1996 p.p28-32
Nonstuck behaviour of open circuit supply faults in CMOS logic circuits
Johnson, S Institution of Electrical Engineers 1996 p.p9-13
Parasitic series resistance-independent method for device-model parameter extraction
Garcia Sanchez, F. J Institution of Electrical Engineers 1996 p.p68-70
Hawksford, M. O Institution of Electrical Engineers 1996 p.p46-52
Signal-noise neural network model for active microwave devices
Guenes, F Institution of Electrical Engineers 1996 p.p1-8