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      Aluminum Gallium nitride / Gallium nitride CAVETs for high power switching application.

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      https://www.riss.kr/link?id=T12872003

      • 저자
      • 발행사항

        [S.l.]: University of California, Santa Barbara 2010

      • 학위수여대학

        University of California, Santa Barbara Electrical & Computer Engineering

      • 수여연도

        2010

      • 작성언어

        영어

      • 주제어
      • 학위

        Ph.D.

      • 페이지수

        196 p.

      • 지도교수/심사위원

        Adviser: Umesh K. Mishra.

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      다국어 초록 (Multilingual Abstract)

      GaN-based power electronics are rapidly developing as a contender for application in next generation high efficiency power electronics. They are either lateral devices like HEMTs or vertical devices of the form of the Current Aperture Vertical Electr...

      GaN-based power electronics are rapidly developing as a contender for application in next generation high efficiency power electronics. They are either lateral devices like HEMTs or vertical devices of the form of the Current Aperture Vertical Electron Transistor (CAVET). A CAVET is a vertical device with source and gate on top and a current aperture that allows current to flow vertically down from the source to the drain. It has a current blocking layer (CBL) to block current flowing vertically through any other path but the aperture. Lateral devices have been and still continue to be the center of attention in the AlGaN/GaN based device structures owing to the horizontal nature of the 2DEG. In power integrated circuits, there is frequently a need for several power devices to be formed on a single chip. One such application is an H-bridge driver circuit for motor control. In order to reduce the cost and increase the yield of an integrated circuit having multiple power devices, the size of each power device must be minimized.
      The size of a power device is dictated mainly by the need for a given low onresistance (Ron). The minimum on-resistance per unit area is normally associated with a vertical device, as opposed to a lateral device. In such devices, the gate and source are formed on a semiconductor surface and the drain contact is located at the bottom of the chip. Hence, the substrate acts as the drain. Higher current can be obtained per unit chip area in a vertical topology. Further, the drain contact is at the bottom in the vertical transistors and the metal scheme required to handle high currents is simplified. The availability of high quality, low-defect density bulk GaN material triggered the work done in this thesis, where it was shown that the structure can hold up to 100V/mum which is comparable or higher than a lateral device. From the demonstration of AlGaN/GaN CAVET on conductive GaN substrate to achieving dispersion less (gate pulsed with 80 mus pulse width) CAVET with less than 2.5mO-cm2 forms the framework of this study. This work was to explore the power handling capability of AlGaN/GaN system in its vertical mode of operation. Finding a good current blocking material and determining the most effective device dimensions forms the backbone of this work. As this thesis is being written, GaN vertical devices are attracting attention of power electronics research where higher efficiency and smaller chip area take it all.

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