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Energy-efficient Reconfigurable FEC Processor for Multi-standard Wireless Communication Systems
Li, Meng,der Perre, Liesbet Van,van Thillo, Wim,Lee, Youngjoo The Institute of Electronics and Information Engin 2017 Journal of semiconductor technology and science Vol.17 No.3
In this paper, we describe HW/SW co-optimizations for reconfigurable application specific instruction-set processors (ASIPs). Based on our previous very long instruction word (VLIW) ASIP, the proposed framework realizes various forward error-correction (FEC) algorithms for wireless communication systems. In order to enhance the energy efficiency, we newly introduce several design methodologies including high-radix algorithms, task-level out-of-order executions, and intensive resource allocations with loop-level rescheduling. The case study on the radix-4 turbo decoding shows that the proposed techniques improve the energy efficiency by 3.7 times compared to the previous architecture.
Energy-efficient Reconfigurable FEC Processor for Multi-standard Wireless Communication Systems
Meng Li,Liesbet Van der Perre,Wim van Thillo,Youngjoo Lee 대한전자공학회 2017 Journal of semiconductor technology and science Vol.17 No.3
In this paper, we describe HW/SW cooptimizations for reconfigurable application specific instruction-set processors (ASIPs). Based on our previous very long instruction word (VLIW) ASIP, the proposed framework realizes various forward error-correction (FEC) algorithms for wireless communication systems. In order to enhance the energy efficiency, we newly introduce several design methodologies including high-radix algorithms, tasklevel out-of-order executions, and intensive resource allocations with loop-level rescheduling. The case study on the radix-4 turbo decoding shows that the proposed techniques improve the energy efficiency by 3.7 times compared to the previous architecture.