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Dead-Time for Zero-Voltage-Switching in Battery Chargers with the Phase-Shifted Full-Bridge Topology
Taizhi Zhang,Junyu Fu,Qinsong Qian,Weifeng Sun,Shengli Lu 전력전자학회 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.2
This paper presents a comprehensive theoretical analysis and an accurate calculation method of the dead-time required to achieve zero-voltage-switching (ZVS) in a battery charger with the phase-shifted full-bridge (PSFB) topology. Compared to previous studies, this is the first time that the effects of nonlinear output filter inductance, varied Miller Plateau length, and blocking capacitors have been considered. It has been found that the output filter inductance and the Miller Plateau have a significant influence on the dead-time for ZVS when the load current varies a lot in battery charger applications. In addition, the blocking capacitor, which is widely used to prevent saturation, reduces the circulating current and consequently affects the setting of the dead-time. In consideration of these effects, accurate analytical equations of the dead-time range for ZVS are deduced. Experimental results from a 1.5kW PSFB battery charger prototype shows that, with the proposed analysis, an optimal dead-time can be selected to meet the specific requirements of a system while achieving ZVS over wide load range.
A Novel PCCM Voltage-Fed Single-Stage Power Factor Correction Full-Bridge Battery Charger
Taizhi Zhang,Zhipeng Lu,Qinsong Qian,Weifeng Sun,Shengli Lu 전력전자학회 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.3
A novel pseudo-continuous conduction mode (PCCM) voltage-fed single-stage power factor correction (PFC) full-bridge battery charger is proposed in this paper. By connecting a freewheeling transistor in parallel with an input inductor, the PFC cell can operate in the PCCM with a constant duty ratio. Thus, the dc/dc stage can be designed using this constant duty ratio and the restriction on the duty ratio of the PFC cell is eliminated. As a result, the input current distortion is less and the dc bus voltage becomes controllable over the wide output power range of the battery charger. Moreover, the operation principle of the dc/dc stage is designed to be similar to that of a conventional phase-shifted full-bridge converter. Therefore, it is easy to implement. In this paper, the operation of the new converter is explained, and the design considerations of the controller and key parameters are presented. Simulation and experimental results obtained from a 1 kW prototype are given to confirm the operation of the proposed converter.
Zhang, Taizhi,Fu, Junyu,Qian, Qinsong,Sun, Weifeng,Lu, Shengli The Korean Institute of Power Electronics 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.2
This paper presents a comprehensive theoretical analysis and an accurate calculation method of the dead-time required to achieve zero-voltage-switching (ZVS) in a battery charger with the phase-shifted full-bridge (PSFB) topology. Compared to previous studies, this is the first time that the effects of nonlinear output filter inductance, varied Miller Plateau length, and blocking capacitors have been considered. It has been found that the output filter inductance and the Miller Plateau have a significant influence on the dead-time for ZVS when the load current varies a lot in battery charger applications. In addition, the blocking capacitor, which is widely used to prevent saturation, reduces the circulating current and consequently affects the setting of the dead-time. In consideration of these effects, accurate analytical equations of the dead-time range for ZVS are deduced. Experimental results from a 1.5kW PSFB battery charger prototype shows that, with the proposed analysis, an optimal dead-time can be selected to meet the specific requirements of a system while achieving ZVS over wide load range.
A Novel PCCM Voltage-Fed Single-Stage Power Factor Correction Full-Bridge Battery Charger
Zhang, Taizhi,Lu, Zhipeng,Qian, Qinsong,Sun, Weifeng,Lu, Shengli The Korean Institute of Power Electronics 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.3
A novel pseudo-continuous conduction mode (PCCM) voltage-fed single-stage power factor correction (PFC) full-bridge battery charger is proposed in this paper. By connecting a freewheeling transistor in parallel with an input inductor, the PFC cell can operate in the PCCM with a constant duty ratio. Thus, the dc/dc stage can be designed using this constant duty ratio and the restriction on the duty ratio of the PFC cell is eliminated. As a result, the input current distortion is less and the dc bus voltage becomes controllable over the wide output power range of the battery charger. Moreover, the operation principle of the dc/dc stage is designed to be similar to that of a conventional phase-shifted full-bridge converter. Therefore, it is easy to implement. In this paper, the operation of the new converter is explained, and the design considerations of the controller and key parameters are presented. Simulation and experimental results obtained from a 1 kW prototype are given to confirm the operation of the proposed converter.
Qinsong Qian,Weifeng Sun,Taizhi Zhang,Shengli Lu 전력전자학회 2017 JOURNAL OF POWER ELECTRONICS Vol.17 No.1
A novel voltage-fed single-stage power factor correction (PFC) full-bridge converter based on asymmetric phase-shifted control for battery chargers is proposed in this paper. The attractive feature of the proposed converter is that it can operate in a wide output voltage range without an output low-frequency ripple, which is indispensable in battery charger applications. Meanwhile, the converter can maintain a high power factor and a controllable dc bus voltage over a wide output voltage range. In this paper, the realization of PFC and the operation principle of asymmetric phase-shifted control are given. A small-signal analysis of the proposed single-stage power factor correction (PFC) full-bridge converter is performed. Experimental results obtained from a 1kW experimental prototype are given to validate the feasibility of the proposed converter. The PF is higher than 0.97 over the entire output voltage range with the proposed control strategy.
Qian, Qinsong,Sun, Weifeng,Zhang, Taizhi,Lu, Shengli The Korean Institute of Power Electronics 2017 JOURNAL OF POWER ELECTRONICS Vol.17 No.1
A novel voltage-fed single-stage power factor correction (PFC) full-bridge converter based on asymmetric phase-shifted control for battery chargers is proposed in this paper. The attractive feature of the proposed converter is that it can operate in a wide output voltage range without an output low-frequency ripple, which is indispensable in battery charger applications. Meanwhile, the converter can maintain a high power factor and a controllable dc bus voltage over a wide output voltage range. In this paper, the realization of PFC and the operation principle of asymmetric phase-shifted control are given. A small-signal analysis of the proposed single-stage power factor correction (PFC) full-bridge converter is performed. Experimental results obtained from a 1kW experimental prototype are given to validate the feasibility of the proposed converter. The PF is higher than 0.97 over the entire output voltage range with the proposed control strategy.
Yu, Juzheng,Qian, Qinsong,Sun, Weifeng,Zhang, Taizhi,Lu, Shengli The Korean Institute of Power Electronics 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.3
A high-efficiency method is proposed to suppress magnetic core imbalance in phase-shifted full-bridge (PSFB) converters. Compared with conventional solutions, such as controlling peak current mode (PCM) or adding DC blocking capacitance, the proposed method has several advantages, such as lower power loss and smaller size, because the additional current sensor or blocking capacitor is removed. A time domain model of the secondary side is built to analyze the relationship between transformer core imbalance and cathode voltage of secondary side rectifiers. An approximate control algorithm is designed to achieve asymmetric phase control, which reduces the effects of imbalance. A 60 V/15 A prototype is built to verify the proposed method. Experimental results show that the numerical difference of primary side peak currents between two adjacent cycles is suppressed from 2 A to approximately 0 A. Meanwhile, compared with the PCM solution, the efficiency of the PSFB converter is slightly improved from 93% to 93.2%.
Juzheng Yu,Qinsong Qian,Weifeng Sun,Taizhi Zhang,Shengli Lu 전력전자학회 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.3
A high-efficiency method is proposed to suppress magnetic core imbalance in phase-shifted full-bridge (PSFB) converters. Compared with conventional solutions, such as controlling peak current mode (PCM) or adding DC blocking capacitance, the proposed method has several advantages, such as lower power loss and smaller size, because the additional current sensor or blocking capacitor is removed. A time domain model of the secondary side is built to analyze the relationship between transformer core imbalance and cathode voltage of secondary side rectifiers. An approximate control algorithm is designed to achieve asymmetric phase control, which reduces the effects of imbalance. A 60 V/15 A prototype is built to verify the proposed method. Experimental results show that the numerical difference of primary side peak currents between two adjacent cycles is suppressed from 2 A to approximately 0 A. Meanwhile, compared with the PCM solution, the efficiency of the PSFB converter is slightly improved from 93% to 93.2%.