CMOS 연산 증폭기의 고장검출

한석붕,윤원효 慶尙大學校生産技術硏究所 1998 生産技術硏究所論文集 Vol.14 No.-

In this paper, a novel test method is proposed to detect hard and soft faults in CMOS operational amplifiers. Proposed test method makes use of the offset voltage, which is one of the op-amps specifications. During the test mode, CUT is implemented to unit gain op-amps with feedback loop. When the input is grounded, a good circuit has a small offset voltage, but a faulty circuit has a large offset voltage exceeding predefined range of tolerance. Using the proposed method, no test vector is required to be applied. Therefore the test vector generation problem is eliminated and the test time is reduced. The accuracy and effectiveness of the method is verified through HSPICE simulation.

음소를 이용한 음성신호처리에 관한 연구

신태민,한석봉,김영일 慶尙大學校生産技術硏究所 1991 生産技術硏究所論文集 Vol.7 No.-

Korean speech signals can be divided into the phonemes such as consonant, vowel, and end-consonant according to the characteristic and structure its pronunciation. The experiment is carried out by dividing 975 isolated words into phonemes. The recognition rate of consonant, vowel, and end-consonant with DTW are 85.7(%), 80.0(%) and 93.1(%), respectively. The recognition rate of consonant, vowel, and end-consonant with HMM are 82.1(%), 77.7(%) and 86.9(%), respectively. It is shown the Korean speech signals are recognized in the same way minimum data and short processing time.

기중기에 사용된 모터의 회전수 측정장치 개발

김강철,한석붕 호서대학교 반도체제조장비국산화연구센터 2001 반도체장비학술심포지움 Vol.2001 No.-

본 논문에서는 기중기에 사용된 모터의 회전수를 측정하는 장치를 설계하였다.이 장치는 로타리엔코더, 회전수를 계산하는 속도 측정부, LCD표시부 및 모터의 방향판별회로로 구성된다.모터의 회전수측정 장치는 모터의 회전수를 측정하여 RPM으로 표시하고, 모터가 6˚ 회전 후에 모터의 방향을 판별할 수 있다.그리고 모터가 제한속도를 벗어나면 위험신호를 발생하는 신호와 회전방향을 나타내는 신호를 발생한다.

개선된 다출력 동적 CMOS 설계 방식을 이용한 고성능 32 비트 CLA가산기 설계 및 구현

송근호,방만식,서정훈,한석붕,이효상,김강철 慶尙大學校生産技術硏究所 1997 生産技術硏究所論文集 Vol.13 No.-

In this paper, we designed, implemented and evaluated 32-bit CLA adder with the ENMODL(enhanced NORA Multiple Output Domino Logic) logic style which is new dynamic CMOS logic. The circuit is implemented using 0.8㎛ CMOS double-metal process technology. It operates stably and the addition time is less 3.9 ns. The ENMODL logic style can improve the performance in the high-speed computing circuits depending on the degree of recurrence.

CMOS VLSI의 IDDQ 테스트세트 간략화에 관한 연구

김강철,송근호,한석봉 진주산업대학교 1996 論文集 Vol.35 No.-

This paper proposes a dynamic compaction algorithm which can detect intra-bridging faults for IDDQ testing in CMOS VLSI. X_gates which have X(don't care) values in the input of the gate may exist in the circuit after a test pattern in chosen. The compaction algorithm assigns the logic value 1 or 0 that can be applied to the primitive fault pattern to X in the X_gate, and it detects all detectable faults for a test pattern. The simulation results in the benchmark circuits show that the fault coverage of this dynamic compaction algorithm is much enhanced compared with the conventional static compaction algorithms, and the resulting test vector reduction is up to 30%.

Prediction Models for Suicide Attempts among Adolescents Using Machine Learning Techniques

Jae Seok Lim(Jae Seok Lim),Chan-Mo Yang(Chan-Mo Yang),Ju-Won Baek(Ju-Won Baek),Sang-Yeol Lee(Sang-Yeol Lee),Bung-Nyun Kim(Bung-Nyun Kim) 대한정신약물학회 2022 CLINICAL PSYCHOPHARMACOLOGY AND NEUROSCIENCE Vol.20 No.4

Objective: Suicide attempts (SAs) in adolescents are difficult to predict although it is a leading cause of death among adolescents. This study aimed to develop and evaluate SA prediction models based on six different machine learning (ML) algorithms for Korean adolescents using data from online surveys. Methods: Data were extracted from the 2011−2018 Korea Youth Risk Behavior Survey (KYRBS), an ongoing annual national survey. The participants comprised 468,482 nationally representative adolescents from 400 middle and 400 high schools, aged 12 to 18. The models were trained using several classic ML methods and then tested on internal and external independent datasets; performance metrics were calculated. Data analysis was performed from March 2020 to June 2020. Results: Among the 468,482 adolescents included in the analysis, 15,012 cases (3.2%) were identified as having made an SA. Three features (suicidal ideation, suicide planning, and grade) were identified as the most important predictors. The performance of the six ML models on the internal testing dataset was good, with both the area under the receiver operating characteristic curve (AUROC) and area under the precision−recall curve (AUPRC) ranging from 0.92 to 0.94. Although the AUROC of all models on the external testing dataset (2018 KYRBS) ranged from 0.93 to 0.95, the AUPRC of the models was approximately 0.5. Conclusion: The developed and validated SA prediction models can be applied to detect high risks of SA. This approach could facilitate early intervention in the suicide crisis and may ultimately contribute to suicide prevention for adolescents.

새로운 전류 감지기를 사용한 일반조명용 고휘도 LED 구동 IC 설계

한석붕(Seok Bung Han),송기남(Ki Nam Song),정상배(Sang Bae Jeong) 제어로봇시스템학회 2010 제어로봇시스템학회 합동학술대회 논문집 Vol.2010 No.6

본 논문에서는 일반조명용으로 사용하는 350mA급 고휘도 LED를 구동할 수 있는 LED 구동 IC를 제안한다 설계한 IC는 평균 LED 전류의 정밀도가 우수하고 간단한 구조의 새로운 전류 감지회로를 사용한다. 특히, 감지 전류 비교기는 하나의 기준 전압과 일반 비교기를 이용하여 구조가 간단하고 전력 소모가 적다, 설계한 IC를 사용한 벅 컨버터는 ±5% 의 LED 전류 리플을 가지고, 평균 LED 전류의 오차율이 최대 2.43%로써 우수하다. 그리고 동작의 신뢰성을 높이기 위해 입력 전압 및 동작 온도에 대한 보호회로를 설계한다. 설계한 LED 구동 IC는 BiCMOS 공정 파라미터를 사용하였고, Spectre(Cadence)를 이용한 시뮬레이션을 통해 전기적 특성을 검증하였다.

동적 문턱전압 MOSFET를 사용한 새로운 저전압 저전력 셀프 캐스코드 구조의 설계 및 응용

한석붕(Seok Bung Han),고진환(Jinhwan Koh),송한정(Han-Jung Song),김강철(Kang-Chul Kim) 대한전자공학회 2018 전자공학회논문지 Vol.55 No.7

본 논문에서는 동적 문턱전압 MOSFET를 사용한 새로운 셀프 캐스코드 구조의 설계방식을 제안한다. 제안한 셀프 캐스코드는 저전압 및 저전력 소비를 위하여 공급전압이 500mV인 약반전 영역에서 동작하며 이 구조는 기존의 구조들에 비하여 칩 면적이 매우 작고 DC 바이어스 전압이 요구되지 않는다. 또한 동적 문턱전압 MOSFET의 특성에 의하여 트랜스컨덕턴스 (출력저항)는 단일 MOSFET 및 기존의 셀프 캐스코드에 비하여 각각 45%(163%), 24%(80%) 이상 증가한다. 본 논문에서 제안한 설계방식의 타당성을 검증하기 위하여, 기존 및 제안한 셀프 캐스코드들에 의하여 전류미러를 설계하였다. 모의실험은 Cadence 툴에 의하여 TSMC 0.18 ㎛ CMOS 공정을 사용하여 수행되었다. 모의실험 결과, 본 논문에서 제안한 방식으로 설계한 전류미러의 출력 전압에 대한 출력전류의 변동률이 20배 이상 향상되었다. In this paper, a design method of the new self-cascode structures using a dynamic threshold voltage MOSFET is proposed. For low-voltage and low-power consumption, the new self-cascode operates in a weak inversion region with a supply voltage of 500mV. The proposed self-cascode structures have a much small chip area than conventional self-cascode structures and do not require DC bias voltage. Also, due to the characteristics of the dynamic threshold voltage MOSFET, the transconductance (output resistance) increases by 45% (163%) and 24% (80%) over a single MOSFET and conventional self-cascode, respectively. In order to verify the validity of the proposed design method, we design a current mirror using conventional and proposed self-cascodes. Simulations were performed using a TSMC 0.18 ㎛ CMOS process by Cadence tools. Simulation results show that the variation of the output current with respect to the output voltage of the current mirror by the proposed design method is improved more than 20 times.

The Influence of Entrepreneur’s Opportunity and Business Model Design and Change

Bung-Kun KIM,Min-Jung KANG,Jong-Seok KIM(김종석) 한국경영학회 2021 한국경영학회 통합학술발표논문집 Vol.2021 No.8

This study attempts to look into the relationship between entrepreneur’s opportunity and business model design and change. One of the key areas in entrepreneurship study is entrepreneur’s opportunity. Many studies of business model innovation have been insufficiently examined the role of entrepreneur’s opportunity. This paper is an initial proposal to examine the relationship between them. Existing studies argued that entrepreneur’s opportunity identification can be the first step, while the business model innovation can be the second step in any entrepreneur activity. However, through the literature review of business model innovation, this study suggests the three components (value proposition, value creation and value capture), consisting of a business model. Many studies pointed out that the initial business model in a venture can’t be competent, effective and manifest. From the original design in a venture, the business model can be changed from given or unanticipated problems. However, to conduct a business model innovation is to realize entrepreneur’s opportunity. In spite of various theoretical perspectives of entrepreneur’s opportunity, this study wants to take psychological perspective and social construction perspective, which identify different elements of entrepreneur’s opportunity identification. Thus, by reviewing the existing literatures, this study intends to investigate the influence of different elements in entrepreneur’s opportunity identification on each component creation of a business model; the difference between business model design and change in the influence of entrepreneur’s opportunity identification.

시뮬레이션을 이용한 평판형LED조명의 최적배치 연구

최석준(Seok-Joon Choi),신백균(Paik-Gyun Shin),이붕주(Bung-Ju Lee),황명근(Myung-Keun Hwang),이세현(Se-Hyun Lee) 한국조명·전기설비학회 2012 한국조명·전기설비학회 학술대회논문집 Vol.2012 No.5