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Choi, Seojin,Yoo, Seyeon,Lim, Younghyun,Choi, Jaehyouk IEEE 2016 IEEE journal of solid-state circuits Vol.51 No.8
<P>A low-jitter, ring-type voltage-controlled oscillator (VCO)-based injection-locked clock multiplier (ILCM) with a continuous frequency-tracking loop (FTL) for process-voltage-temperature (PVT)-calibration is presented. Using a single replica-delay cell of the VCO that provides the intrinsic phase information of the free-running VCO, the proposed FTL can continuously track and correct frequency drifts. Therefore, the proposed ILCM can calibrate real-time frequency drifts due to voltage or temperature variations as well as static frequency deviations due to process variations. Since the FTL provided an additional filtering of in-band VCO noise, the ILCM was able to achieve excellent jitter performance over the PVT variations, while it was based on a ring-VCO. The proposed ILCM was fabricated in a 65 nm CMOS process. When injection locked, the RMS-jitter integrated from 10 kHz to 40 MHz of the 1.20 GHz output signal was 185 fs. The proposed PVT-calibrator regulated the degradations of jitter to less than 5% and 7% over temperatures and supply voltages, respectively. The active area was 0.06 mm(2) and total power consumption was 9.5 mW.</P>
Choi, Seojin,Yoo, Seyeon,Lee, Yongsun,Jo, Yongwoo,Lee, Jeonghyun,Lim, Younghyun,Choi, Jaehyouk IEEE 2019 IEEE journal of solid-state circuits Vol.54 No.4
<P>An ultra-low-jitter, ring-<I>LC</I> -hybrid injection-locked clock multiplier (ILCM) is presented to achieve a high multiplication factor of 114. The proposed hybrid ILCM cascades a ring-type voltage-controlled oscillator (VCO)-based ILCM and an <I>LC</I>-type VCO-based ILCM. Using a dual-purpose frequency calibrator (DPFC) that can continuously calibrate the frequency drifts of the two VCOs, concurrently, the proposed ILCM can maintain excellent jitter performance against process-voltage-temperature (PVT) variations. Since the DPFC eliminates the use of an additional calibrator and operates at a very low frequency, it can reduce the expenditures for silicon and power. The proposed ILCM was fabricated in a 65-nm CMOS process. The RMS jitter of the 22.8-GHz output, integrated from 1 kHz to 100 MHz, was 153 fs, and the DPFC restricted its variations due to variations in temperatures and supply voltages to less than 180 fs. The proposed ILCM achieved the power efficiency of 0.32 mW/GHz. The active area was 0.2 mm<SUP>2</SUP>. The total power consumption was 7.4 mW, but the DPFC consumed only 400 <TEX>$\mu \text{W}$</TEX>.</P>
학교폭력 예방을 위한 인터넷 기반 분노조절 프로그램의 개발과 효과 검증
오서진(Seojin Oh),장현아(Hyun A Chang),최지윤(Ji-Yoon Choi),신민섭(Min-Sup Shin) 대한소아청소년정신의학회 2013 소아청소년정신의학 Vol.24 No.3
Objectives:This study aims to investigate the effectiveness of an internet-based anger management program for school-aged children. Methods:Forty-eight elementary school students took part in an anger management training program; subsequently, participants, their parents, and their teachers answered questionnaires assessing the participants’anger, aggressiveness, and other emotional/ behavioral problems, pre- and post-training. Results:At the post-training self-assessment, the participants showed significant reductions in their “anger-out” tendencies and physical aggressiveness. In addition, the effects of the program on “anger-out” tendencies, aggressiveness, anger and peer relational problem were found to be more significant in participants who reported depressive symptoms. Teachers rated the participants’ peer-relational problems as having decreased after the training. Conclusion:The proposed internet-based anger management program had a significant effect on the school-aged children’s abilities to control their anger.
Mina Kim,Seojin Choi,Taeho Seong,Jaehyouk Choi IEEE 2016 IEEE journal of solid-state circuits Vol.51 No.2
<P>A low-jitter and fractional-resolution injection-locked clock multiplier (ILCM) with a delay-locked-loop (DLL)-based process-voltage-temperature (PVT)-calibrator is proposed. The ring-type voltage-controlled oscillator (VCO) and the voltage-controlled delay line (VCDL) of the DLL consist of identical delay cells, and they share the same control voltage. Thus, by changing the ratio between the numbers of stages of the VCDL and the VCO, the frequency of the VCO can be calibrated at any target frequencies, noninteger times the reference frequency. As the amount of the unit delay is adjusted continuously by the DLL, the VCO can overcome real-time frequency drifts as well as static process variations; thus, excellent jitter performance can be sustained during any environmental variations. The proposed ILCM, designed in the 65 nm CMOS process, generated output frequencies that range from 1.2 to 2.0 GHz with a frequency resolution of 40 MHz and a 400 MHz reference clock. When injection locked, the integrated jitter from 1 kHz to 40 MHz of the 1.6 GHz signal was 440 fs. The proposed real-time PVT calibrator restricted the degradations of phase noise and jitter over the temperature and the supply variations to less than 0.7 dB and 20%, respectively. The active area was 0.032 mm(2) and the power consumption was 3.6 mW.</P>