8개 압저항 브릿지구조를 이용한 저 타축 감도 실리콘 가속도센서

徐熙敦,李榮泰,崔世崑 경북대학교 센서기술연구소 1995 센서技術學術大會論文集 Vol.6 No.1

A low off-axis sensitivity piezoresistive accelerometer has been presented. The off-axis sensitivity was reduced by arrangement of eight piezoresistors on two the beams. The structure and stress distribution of the accelerometer was optimized using FEM(finite element modeling) simulation. The dependence of sensitivity and resonance frequency were also simulated as a function of the beam length for a constant overall size(2000μm). Accurate thickness control of the beams was realized by the etch-stop techonology using SDB(silicon direct bonding) wafer SiO_(2) layer and RIE(reative ion etching) method. This method is relatively simple and very useful for fabrication of accelerometer.

지능화 진단 시스템개발을 위한 광바이오 텔레미트리 칩 제작

서희돈,박차훈,배용욱,최세곤 嶺南大學校 工業技術硏究所 1997 工業技術硏究所論文集 Vol.25 No.1

In this paper, we fabricated optical telemetry IC chip using CMOS process. The telemetering IC with the size of 4 ×4㎟ has the following functions: receiving of command signals, initialization of internal state of all functional blocks, decoding of subject-selection signal, time multiplexing of 4-channel modulated physiological signals, transmission of telemetry signal to extemal system, and auto power down control. The designed synchronous oscillator with low supply voltage dependence operates at a supply voltage from 4.6V-6.0V. And the nonlinearity error of PIM modulator was less than 1.2%FS. In order to demonstrate the principle operations of the implemented CMOSIC chip, the experiments of biotelemetry was performed by telemeter unit and external unit. Main features of this system are to select one of the 4 subjects, to enable measurement of biological signals using the same optical signal, and transmit them back to the extemal unit.

Pattern data 고속처리용 양방향 Switching Network 설계

서희돈 嶺南大學校 工業技術硏究所 1990 연구보고 Vol.18 No.1

This paper describes design of bi directional switching network which is a new parallel processing concept of layout pattern data. This network is consist of x and y directional 16 bit barrel shifters. The barrel shifter is designed as 256 n channel MOS transister and made into physical layout according to 3μm designed rules. The proposed system has considerable high speed as compared with an existing parallel processing method or a sofware processing method.

전단응력형 압저항 압력센서의 최적화

徐熙敦,魚秀海,高野亮一,李榮泰,中村哲郞 경북대학교 센서기술연구소 1994 센서技術學術大會論文集 Vol.5 No.1

Three kinds of pressure sensors, which diaphragm size are 0.8Xo.8mm^(2), 0.8X1.2mm^(2) and 0.8X2.4mm^(2) respectively, have been fabricated. In order to obtain optimum gauge according to results of FEM simulation about distribution of shear stress. Three strain gauge with different locations are made on a rectangular diaphragm. The sensitivities of gauges made at the edge of the longer axis(y axis) in 0.8X1.2mm^(2) and 0.8X2.4mm^(2)diaphragm size, are 10.4mV/V·kgf/cm^(2) and 11.1mV/V·kgf/cm^(2) respectively. These are above twice the sensitivities of gauges that is located at the center of the same diaphragms.

생체신호 처리용 ASIC 칩 개발

서희돈,이준하 경북대학교 센서기술연구소 1997 연차보고서 Vol.1997 No.-

多衆 生體信號處理用 光 바이오텔레미트리 시스템

徐熙敦,朴鍾大,宋本佳宣 경북대학교 센서기술연구소 1995 연차보고서 Vol.1995 No.-

근래 생체공학 분야에 있어서 실험동물에 가능한 한 부담을 적게 주는 원격 텔레미트리 시스템, 즉 바이오텔레미트리 시스템 개발을 필요로 하고 있다. 바이오텔레미트리 시스템은 멀리 떨어져 있는 관측자에게 실험체의 생체신호를 전기적 도는 광학적으로 전달하는 방법이다. 이 텔레미트리 시스템에 요구되는 특성으로는 소형, 경량, 저소비전력, 전원의존성이 적어야 할 뿐 아니라 한 번에 가능한 한 많은 정보를 추출할 수 있어야 한다. 이러기 위해서는 CMOS 소자 기술에 의한 one-chip의 텔레미트리용 IC가 요구된다. 본 연구에서는 4가지의 실험체로부터 하나를 선택하고 선택된 실험체에서 4가지 신호를 연속적으로 처리할 수 있는 텔레미트리 시스템을 5.1×5.1㎥ CMOS IC로 제작하고 그 특성을 측정한다. 또 잡음에 강하고 먼 거리까지 충분한 크기의 생체신호를 송·수신할 수 있는 光을 전송매체로 하는 송·수신 텔레미트리 시스템을 구축한 후 파생되는 전원전압의 감소에 따른 내부 생체데이타의 불안정성과 성전력화(省電力化)를 위해 정전류원, 발진기 및 변조방식을 제안한다. In biotelemetry area, these has been increasing intrest in developing a remote monitoring system, or biotelemetry system. Biotelemetry system transmits monitored experimental subject biological data to an electrical instrument at remote place where this information can observed via electrical or optical link. In order to realized long term operation continuously, telemetry IC has to satisfy several requirements, such as miniaturization, low power consumption, obtaining massive data and independency on supply voltage. To meet these demands, we fabricated telemetry 1C chip with the size of 5.1×5.1㎥ using 5㎛ CMOS process. We has been studying biotelemetry system which can get simultaneously 4 channel biosignals from 4 subjects. Although a lot of studies of biotelemetry system has been reported, most of them were emphasized on how to convey signals between a subject and a observer, and problems arises in the telemetry IC after long lapse of time have been fully considered. Since batteries must be attached on a subject with telemetry IC, on of the most serious problems is that signals or within the telemetry IC are strongly affected by varying of supply voltage. This may is possible to continue telemetry. In this study, we tried to solve the problem by devising circuits configuration. To eliminate the effect caused by varying of supply voltage, we introduced oscillator and current source which consist of parasitic bipolar transistor accompanying CMOS process.

일괄공정 압저항혈 압력센서의 특성

서희돈,이동원,손미정,최세곤 嶺南大學校 工業技術硏究所 1998 工業技術硏究所論文集 Vol.26 No.1

This paper describes structural characteristics of three kinds of piezoresistive pressure sensors, which include wheatstone-bridge type, center-boss type and single-element type, fabricated on one-chip by batch process. In order to optimize device dimensions with respect to the desired characteristics, analytical formula and finited-element modeling(FEM) are used in design process. In experiments the pressure sensitivity of wheatstone-bridge type is about 2.2㎷/V·㎪. The fabricated center-boss pressure sensor has improved in the characteristics as linearity at low pressure, and sensitivity is about 2.415㎷/V·㎪. In single-element type with a four-terminal gauge using shear stress, the maximum sensitivity about 0.4㎷/V·㎪ appeared at the center of the diaphragm with the 3:1 of the length : width ratio. this type is very appropriate method to minimize the temperature dependance of the offset voltage and sensitivity, because the fabricated sensors reduce the offset of themal stress and mismatch of piezoresistros as compared with the wheatstone-bridge type.

CMOS 표준 셀 설계와 계산기를 이용한 레이아웃에 관한 연구

서희돈 嶺南大學校 工業技術硏究所 1988 연구보고 Vol.16 No.1

This paper describes the CMOS standard cell library implemented sigle poly gate process with 5㎛ design rule, its placement strategy and its results of testing. This standard cell library contains total 10 cells of basic logic gates, double logic gates and input/output buffers. All of the cells were made to have the equal height of 28λ. Cell placement and floor-plan is based on the iterative pairwise interchange using the estiment total routing length as a figure-of-merit. The device parameter and electric charactristics of each cell were investigated in the test element group. As the testing results of Ring Oscillator, the average delay time for inverter was 1.8(ns).

個人用 컴퓨터를 利用한 半導體 素子의 靜特性 測定 裝置의 開發

徐熙敦,李在範,崔再壽 嶺南大學校 工業技術硏究所 1991 연구보고 Vol.19 No.1

These days personal computer has been used in the various fields including scientific study, business management, students' learning and etc.. This paper describes the development of the system that the static characteristics of semiconductor devices can be easily measured by using the personal computer. This system is composed of interface chip, D/A-A/D converters, and measurement terminal. The algorithms representing the characteristic curves on the computer screen are implemented by C-language. In the experiment of electronic circuits, the characteristics of various semiconductor devices can be easily taken by the measurement system developed in this study. Furthermore, it can give enough helping hand in understanding the electronic circuits, and also raise interest and motive about the students' lesson.

3차원 오브젝트의 隱線除去를 위한 竝列處理技法의 提案 및 口現

柳明春,徐熙敦 嶺南大學校 工業技術硏究所 1991 연구보고 Vol.19 No.1

It is difficult to remove hidden lines or hidden surfaces using conventional algorithms when the shape of the object is complex or real time processing is required. In this paper, we proposed a parallel processing method to reduce the time needed in removing hidden lines of 3-dimensional objects, and implemented it using C language. The parallel processing system to estimate the efficiency of the proposed method is composed of 4 sets of IBM PC/XT(4.77MHz) and a shared memory which is shared by 4 sets of PC. And we constructed system control function libraries using assembly language and C language. The result shows that the speed-up factor of 3.8 times for one data and 3.5 times for the other data was gained accordance with the experiments.