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Mengshu Li,Jie Zhang,Hong-Lei Jin,Dongru Feng,Jinfa Wang,Hong-Bin Wang,Bing Liu 한국식물학회 2019 Journal of Plant Biology Vol.62 No.2
In higher plants, iron (Fe) is an essential elementfor photosynthesis and growth. Two basic helix-loop-helix(bHLH) transcription factors, bHLH104 and IAA-LEUCINERESISTANT3 (ILR3), positively regulate Fe uptake inArabidopsis. Furthermore, an E3 ubiquitin ligase, BRUTUS(BTS) functions as a negative regulator upstream of bHLH104and ILR3 in the Fe homeostasis pathway. Interestingly, wecharacterized a lesion of BRUTUS (BTS), which exhibitedpale-green leaves and retarded in growth. Genetic analysesshowed that only loss of ILR3 could entirely compromise thechlorosis in bts-2 mutants. To further investigate whetherbHLH104 and ILR3 have different roles in functioningdownstream of BTS other than Fe absorption, we obtainedbHLH104-, and ILR3-overexpressing plants. Interestingly,similar to bts-2, overexpression of ILR3 displayed chloroticleaves. Moreover, overexpressing ILR3 also caused theabundance of thylakoid proteins reduced, along withphotosynthetic genes decreased. However, there was novisible difference between bHLH104-overexpressing plantsand WT. Furthermore, we found that bHLH104 and ILR3may act independently on different downstream targets. bHLH104, but not ILR3, could bind to the promoter of At-NEET, which acts as a Fe-S/Fe cluster donor in chloroplasts. Collectively, our data demonstrate that bHLH104 and ILR3possess different downstream targets that may have distincteffects on photosynthesis, although they share a commonfunction in Fe deficiency responses.
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HRSF: Single Disk Failure Recovery for Liberation Code Based Storage Systems
Jun Li,Mengshu Hou 한국정보처리학회 2019 Journal of information processing systems Vol.15 No.1
Storage system often applies erasure codes to protect against disk failure and ensure system reliability andavailability. Liberation code that is a type of coding scheme has been widely used in many storage systemsbecause its encoding and modifying operations are efficient. However, it cannot effectively achieve fast recoveryfrom single disk failure in storage systems, and has great influence on recovery performance as well as responsetime of client requests. To solve this problem, in this paper, we present HRSF, a Hybrid Recovery method forsolving Single disk Failure. We present the optimal algorithm to accelerate failure recovery process. Theoreticalanalysis proves that our scheme consumes approximately 25% less amount of data read than the conventionalmethod. In the evaluation, we perform extensive experiments by setting different number of disks and chunksizes. The results show that HRSF outperforms conventional method in terms of the amount of data read andfailure recovery time.
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Energy Efficient Processing Engine in LDPC Application with High-Speed Charge Recovery Logic
Yimeng Zhang,Mengshu Huang,Nan Wang,Satoshi Goto,Tsutomu Yoshihara 대한전자공학회 2012 Journal of semiconductor technology and science Vol.12 No.3
This paper presents a Processing Engine (PE) which is used in Low Density Parity Codec (LDPC) application with a novel charge-recovery logic called pseudo-NMOS boost logic (pNBL), to achieve high-speed and low power dissipation. pNBL is a high-overdriven and low area consuming charge recovery logic, which belongs to boost logic family. Proposed Processing Engine is used in LDPC circuit to reduce operating power dissipation and increase the processing speed. To demonstrate the performance of proposed PE, a test chip is designed and fabricated with 0.18 ㎛ CMOS technology. Simulation results indicate that proposed PE with pNBL dissipates only 1 pJ/cycle when working at the frequency of 403 ㎒, which is only 36% of PE with the conventional static CMOS gates. The measurement results show that the test chip can work as high as 609 ㎒ with the energy dissipation of 2.1 pJ/cycle.
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HRSF: Single Disk Failure Recovery for Liberation Code Based Storage Systems
Li, Jun,Hou, Mengshu Korea Information Processing Society 2019 Journal of information processing systems Vol.15 No.1
Storage system often applies erasure codes to protect against disk failure and ensure system reliability and availability. Liberation code that is a type of coding scheme has been widely used in many storage systems because its encoding and modifying operations are efficient. However, it cannot effectively achieve fast recovery from single disk failure in storage systems, and has great influence on recovery performance as well as response time of client requests. To solve this problem, in this paper, we present HRSF, a Hybrid Recovery method for solving Single disk Failure. We present the optimal algorithm to accelerate failure recovery process. Theoretical analysis proves that our scheme consumes approximately 25% less amount of data read than the conventional method. In the evaluation, we perform extensive experiments by setting different number of disks and chunk sizes. The results show that HRSF outperforms conventional method in terms of the amount of data read and failure recovery time.
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Energy Efficient Processing Engine in LDPC Application with High-Speed Charge Recovery Logic
Zhang, Yimeng,Huang, Mengshu,Wang, Nan,Goto, Satoshi,Yoshihara, Tsutomu The Institute of Electronics and Information Engin 2012 Journal of semiconductor technology and science Vol.12 No.3
This paper presents a Processing Engine (PE) which is used in Low Density Parity Codec (LDPC) application with a novel charge-recovery logic called pseudo-NMOS boost logic (pNBL), to achieve high-speed and low power dissipation. pNBL is a high-overdriven and low area consuming charge recovery logic, which belongs to boost logic family. Proposed Processing Engine is used in LDPC circuit to reduce operating power dissipation and increase the processing speed. To demonstrate the performance of proposed PE, a test chip is designed and fabricated with 0.18 2m CMOS technology. Simulation results indicate that proposed PE with pNBL dissipates only 1 pJ/cycle when working at the frequency of 403 MHz, which is only 36% of PE with the conventional static CMOS gates. The measurement results show that the test chip can work as high as 609 MHz with the energy dissipation of 2.1 pJ/cycle.
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