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A Wide Range Delay Locked Loop using Flying Butterfly Delay Cells
Injeong Kim,Jinoh Ahn,Daejeong Kim 대한전자공학회 2007 ITC-CSCC :International Technical Conference on Ci Vol.2007 No.7
This paper describes a delay locked loop using flying butterfly delay cells that achieve a wide range operation, low jitter performance, low phase offset and accurate duty ratio. The proposed DLL uses a new structure consisting of a voltage controlled delay line(VCDL), phase detector(PD) and duty cycle corrector(DCC) for the reasonable operation. The DLL has been simulated in a 0.35um CMOS process.