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        An Excess Carrier Lifetime Extraction Method for Physics-based IGBT Models

        Guicui Fu,Peng Xue 전력전자학회 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.2

        An excess carrier lifetime extraction method is derived for physics-based insulated gate bipolar transistor (IGBT) models with consideration of the latest development in IGBT modeling. On the basis of the 2D mixed-mode Sentaurus simulation, the clamp turn-off test is simulated to obtain the tail current. The proposed excess carrier lifetime extraction method is then performed using the simulated data. The comparison between the extracted results and actual lifetime directly obtained from the numerical device model precisely demonstrates the accuracy of the proposed method.

      • SCIESCOPUSKCI등재

        An Excess Carrier Lifetime Extraction Method for Physics-based IGBT Models

        Fu, Guicui,Xue, Peng The Korean Institute of Power Electronics 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.2

        An excess carrier lifetime extraction method is derived for physics-based insulated gate bipolar transistor (IGBT) models with consideration of the latest development in IGBT modeling. On the basis of the 2D mixed-mode Sentaurus simulation, the clamp turn-off test is simulated to obtain the tail current. The proposed excess carrier lifetime extraction method is then performed using the simulated data. The comparison between the extracted results and actual lifetime directly obtained from the numerical device model precisely demonstrates the accuracy of the proposed method.

      • KCI등재

        Investigation on Intermittent Life Testing Program for IGBT

        Yu Cheng,Guicui Fu,Maogong Jiang,Peng Xue 전력전자학회 2017 JOURNAL OF POWER ELECTRONICS Vol.17 No.3

        The reliability issue of IGBT is a concern for researchers given the critical role the device plays in the safety of operations of the converter system. The reliability of power devices can be estimated from the intermittent life test, which aims to simulate typical applications in power electronics in an accelerated manner to obtain lifetime data. However, the test is time-consuming, as testing conditions are not well considered and only rough provisions have been made in the current standards. Acceleration of the test by changing critical test conditions is controversial due to the activation of unexpected failure mechanisms. Therefore, full investigations were conducted on critical test conditions of intermittent life test. A design optimization process for IGBT intermittent life testing program was developed to save on test times without imposing additional failure mechanisms. The applicability of the process has been supported by a number of tests and failure analysis of the test results. The process proposed in this paper can guide the test process for other power semiconductors.

      • SCIESCOPUSKCI등재

        Investigation on Intermittent Life Testing Program for IGBT

        Cheng, Yu,Fu, Guicui,Jiang, Maogong,Xue, Peng The Korean Institute of Power Electronics 2017 JOURNAL OF POWER ELECTRONICS Vol.17 No.3

        The reliability issue of IGBT is a concern for researchers given the critical role the device plays in the safety of operations of the converter system. The reliability of power devices can be estimated from the intermittent life test, which aims to simulate typical applications in power electronics in an accelerated manner to obtain lifetime data. However, the test is time-consuming, as testing conditions are not well considered and only rough provisions have been made in the current standards. Acceleration of the test by changing critical test conditions is controversial due to the activation of unexpected failure mechanisms. Therefore, full investigations were conducted on critical test conditions of intermittent life test. A design optimization process for IGBT intermittent life testing program was developed to save on test times without imposing additional failure mechanisms. The applicability of the process has been supported by a number of tests and failure analysis of the test results. The process proposed in this paper can guide the test process for other power semiconductors.

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