HMS시스템에서 적응필터를 이용한 자함의 소음감소 성능분석

윤경식,정태진,이균경,Yoon, Kyung-Sik,Jung, Tae-Jin,Lee, Kyun-Kyung 한국음향학회 2010 韓國音響學會誌 Vol.29 No.1

수중에서 소나를 이용하여 표적을 탐지하고자 할 때 자함에서 발생되는 소음을 감소시켜 표적의 탐지성능을 향상시키는 것은 매우 중요한 일이다. 본 논문에서는 수상함에서 선체고정형소나(HMS)를 사용하는 경우 두 가지 운영모드에 대하여 자함의 소음감소 성능을 분석하였다. 운영자모드에서는 ALE(Adaptive Line Enhancer)기법을 적용하여 자함신호의 광대역 성분을 감소하므로 토널 성분의 탐지성능을 향상하였으며, 자동모드에서는 주 입력신호와 상관관계를 가진 기준 입력신호를 선정하여 조향 방위로 유입되는 잡음신호를 제거하였다. 적응필터를 설계하기 위하여 NLMS(Normalized LMS)알고리즘을 이용하였으며 실제 해상실험 데이터를 이용하여 시뮬레이션을 수행하므로 제안한 기법의 성능을 확인하였다. In a passive sonar, the improvement of detection performance by using noise cancellation is usually a important problem. In this paper, we have analyzed the own-ship noise cancellation in the two operation modes which are used in the HMS system. In the operator mode, an adaptive line enhancer(ALE) is applied to improve the tonal detection by using broadband noise cancellation and the normalized least mean square(NLMS) algorithm is applied to the design of an adaptive filter. The reference input that is correlated with a primary input can be used to remove the noise incident on the observation directionin the automatic mode. Computer simulations with real sea that data show that the proposed adaptive noise canceller has good performance in passive detection under HMS operation.

마이크로서비스 아키텍처 기반의 통합 콘텐츠관리시스템 설계

윤경식(Kyung Sik Yoon),김영한(Young Han Kim) 한국통신학회 2018 한국통신학회 학술대회논문집 Vol.2018 No.1

GaAs MESFET의 Open 패턴에 의한 새로운 드레인 인덕턴스 추출방법

윤경식(K. S. Yoon),장우진(W. J. Chang),황인갑(I. G. Hwang),김창태(C. T. Kim),정기웅(K. W. Chung) 대한전자공학회 1996 대한전자공학회 학술대회 Vol.1996 No.11

마을공동체 놀이문화 전승주체의 변화 양상

윤경식(Kyeong Sik Yoon),양예숙(Yea Sook Yang),정명철(Myeong Cheol Jeong) 한국지역사회생활과학회 2017 한국지역사회생활과학회 학술대회 자료집 Vol.2017 No.4

전골수성 백혈병 세포주 HL-60 에 대한 Doxorubicin 유발성 Apoptosis 와 Anti-Fas 항체 유발성 Apoptosis 의 비교

윤경식(Kyung Sik Yoon),설지연(Ji Yeon Seol),오현정(Hyun Jeong Ohh),이광수(Kwang Soo Lee),이원규(Won Kyu Lee),정성철(Sung Chul Jung) 한국응용약물학회 1999 Biomolecules & Therapeutics(구 응용약물학회지) Vol.7 No.1

Induction of apoptosis is considered to be the underlying mechanism that accounts for the efficiency of chemotherapeutic drugs. It has recently been proposed that doxorubicin (DOX) can induce apoptosis in human leukemic cells via the Fas/Fas Ligand (FasL) system. Comparison of Fas and Fast mRNA expression between drug- and anti-Fas antibody(Fas-Ab)- induced apoptosis was analyzed for examining the role of Fas/FasL system in the mediation of drug-induced apoptosis. After HL-60 cells were routinely cultured, MTT assay was performed for cytotoxicity test. Giemsa staining was carried out to monitor the apoptosis morphologically. By semiquantitative RT-PCR analysis, the expression of Fas and Fast at 4, 10, 24 hours was determined after DOX and Fas-Ab treatment. Dose-dependent cytotoxicity was induced by DOX-treatment, while Fas-Ab treatment showed the similar dose-dependent pattern but the cytotoxicity is not reached at LD_(50) at 100 ng/ml concentration of Fas-Ab. In the 10ng/ml DOX and 10ng/ml Fas-Ab treated group, typical apoptotic cell morphology was shown such as fragmented nuclei and cell membrane budding in the Giemsa-stained slide. Fas mRNA expression was not changed significantly in the both groups. But, FasL mRNA expression was induced significantly at initial period of apoptosis. In this study, Fas/FasL interaction assumed to be involved in drug-induced apoptosis.

피드백 저항 제어에 의한 무선랜용 가변이득 저전압구동 저잡음 증폭기 MMIC

김근환,윤경식,황인갑,Kim Keun Hwan,Yoon Kyung Sik,Hwang In Gab 한국통신학회 2004 韓國通信學會論文誌 Vol.29 No.10A

본 논문에서 ETRI 0.5$\mu\textrm{m}$ MESFET 라이브러리 공정을 이용하여 동작 주파수 5GHz대 저전압구동 가변이득 저잡음 증폭기 MMIC를 설계 및 제작하였다. 이 저잡음 증폭기는 HIPERLAN/2의 Adaptive Antenna Arrays와 함께 사용할 수 있도록 이득조절이 가능하도록 설계하였다. 가변이득 저잡음 증폭기는 2단 캐스케이드 구조이며, 게이트전압에 따라 채널저항이 제어되는 증가형 MESFET과 저항으로 구성된 부귀환 회로를 제안하였다. 제작된 가변이득 저잡음 증폭기의 측정값은 $V_{DD}$ =1.5V, $V_{GG1}$=0.4V, $V_{GG2}$=0.5V일때 5.5GHz의 중심 주파수, 14.7dB의 소신호 이득, 10.6dB의 입력 반사손실, 10.7dB의 출력 반사손실, 14.4dB의 가변이득, 그리고 잡음지수 2.98dB이다. 또한, 가변이득 저잡음 증폭기는 -19.7dBm의 입력 PldB, -10dBm의 IIP3, 52.6dB의 SFBR, 그리고 9.5mW의 전력을 소비한다.다.다. A variable-gain low-voltage low noise amplifier MMIC operating at 5GHz frequency band is designed and implemented using the ETRI 0.5$\mu\textrm{m}$ GaAs MESFET library process. This low noise amplifier is designed to have the variable gain for adaptive antenna array combined in HIPERLAN/2. The feedback circuit of a resistor and channel resistance controlled by the gate voltage of enhancement MESFET is proposed for the variable-gain low noise amplifier consisted of cascaded two stages. The fabricated variable gain amplifier exhibits 5.5GHz center frequency, 14.7dB small signal gain, 10.6dB input return loss, 10.7dB output return loss, 14.4dB variable gain, and 2.98dB noise figure at V$\_$DD/=1.5V, V$\_$GGl/=0.4V, and V$\_$GG2/=0.5V. This low noise amplifier also shows-19.7dBm input PldB, -10dBm IIP3, 52.6dB SFDR, and 9.5mW power consumption.

CMOS 능동 인덕터를 이용한 동조가능 저잡음 증폭기의 잡음성능 향상에 관한 연구

성영규,윤경식,Sung, Young-Kyu,Yoon, Kyung-Sik 한국정보통신학회 2011 한국정보통신학회논문지 Vol.15 No.4

본 논문에서는 CMOS 능동 인덕터를 이용하여 1.8GHz PCS 대역과 2.4GHz WLAN 대역에서 동조가 가능한 저잡음 증폭기의 새로운 회로구조를 제안하였다. CMOS 능동 인덕터 부하를 이용하는 저잡음 증폭기의 높은 잡음지수를 줄이기 위한 회로구조와 잡음지수를 더욱 감소시키기 위한 잡음상쇄기법을 적용하고 해석하였다. 이 동조가능 저잡음 증폭기를 $0.18{\mu}m$ CMOS 공정기술로 시뮬레이션을 수행한 결과는 잡음성능이 약 3.4dB 향상된 것을 보여주며, 이는 주로 제안된 새로운 회로구조에 기인한다. In this paper, a novel circuit topology of a low-noise amplifier tunable at 1.8GHz band for PCS and 2.4GHz band for WLAN using a CMOS active inductor is proposed. This circuit topology to reduce higher noise figure of the low noise amplifier with the CMOS active load is analyzed. Furthermore, the noise canceling technique is adopted to reduce more the noise figure. The noise figure of the proposed circuit topology is analyzed and simulated in $0.18{\mu}m$ CMOS process technology. Thus, the simulation results exhibit that the noise performance enhancement of the tunable low noise amplifier is about 3.4dB, which is mainly due to the proposed new circuit topology.

클러스터링 기법을 이용한 음원의 위치추정 성능향상

이호진,윤경식,이균경,Lee, Ho Jin,Yoon, Kyung Sik,Lee, Kyun Kyung 한국군사과학기술학회 2016 한국군사과학기술학회지 Vol.19 No.1

Source localization has developed in various fields of signal processing including radar, sonar, and wireless communication, etc. Source localization can be found by estimating the time difference of arrival between the each of sensors. Several methods like the NLS(Nonlinear Least Square) cost function have been proposed in order to improve the performance of time delay estimation. In this paper, we propose a clustering method using the four sensors with the same aperture as previous methods of using the three sensors. Clustering method can be improved the source localization performance by grouping similar estimated values. The performance of source localization using clustering method is evaluated by Monte Carlo simulation.

대공포 피격에 의한 항공기 날개 손상에 관한 연구

심상기,윤경식,김근원,신기수,Sim, Sang-Ki,Yoon, Kyong-Sik,Kim, Geun-Won,Shin, Ki-Su 한국군사과학기술학회 2012 한국군사과학기술학회지 Vol.15 No.6

Aircraft battle damage repair(ABDR) is emergency repair method for the damaged aircraft in battle field. The main purpose of the ABDR is to increase the readiness of fighter aircraft during wartime. While many studies have been conducted to develop ABDR method, few efforts have focused on evaluation of damage and determination of the size of hole caused by enemy's anti-aircraft artillery attack. The aim of this study is essentially to quantify damage of aircraft wing attacked by anti-aircraft artillery. The computer simulations was performed to accomplish this goal. A number of simulations have been carried out to compare size of damages under various attack conditions. In conclusion, it was revealed that the size of damage varied depending on the type and direction of cannonball. Furthermore, in this paper, the proper path sizes are suggested for different damage conditions.

LDD MOSFET의 기생저항에 대한 간단한 모형

이정일,윤경식,이명복,강광남,Lee, Jung-Il,Yoon, Kyung-Sik,Lee, Myoung-Bok,Kang, Kwang-Nham 대한전자공학회 1990 전자공학회논문지 Vol. No.

본 논문에서는 LDD(lightly doped drain)구조를 갖는 짧은 채널 MOSFET에서의 기생저항의 게이트 전압 의존도에 대한 모형을 제시하였다. 게이트 전극 밑에 위치한 LDD 영역에서는 게이트 전압에 의해 준 이차원적인 축적층(quasi two-dimensional accumulation layer)이 형성된다. 소오스 측 LDD 기생저항을 축적층의 저항과 벌크 LDD 저항의 병렬 연결로 취급하였으며 별크 LDD 저항은 채널의 반전층 끝으로부터 ${n^+}$영역의 경계까지 퍼짐 저항으로 근사하였다. 그리고 접합에서의 도우핑 농도 구배가 LDD 저항에 미치는 영향이 토의하였다. 본 모형의 결과로 선형 영역에서는 LDD 저항이 게이트 전압의 증가에 따라 감소하고, 포화영역에서는 채널과 LDD에서 속도포화를 고려한 결과, 게이트 전압에 대해 준 일차적으로 증가하는 것으나 나타나 발표된 실험결과들과 일치하였다. In this paper, a simple model is presented for the gate-voltage dependence of the parasitic resistance in MOSFETs with the lightly-doped drain (LDD) structure. At the LDD region located under the gate electrode, an accumulation layer is formed due to the gate voltage. The parasitic resistance of the source side LDD in the channel is treated as a parallel combination of the resistance of the accumulation layer and that of the bulk LDD, which is approximated as a spreading resistance from the end of the channel inversion layer to the ${n^+}$/LDD junction boundary. Also the effects of doping gradients at the junction are discussed. As result of the model, the LDD resistance decreases with increasing the gate voltage at the linear regime, and increase quasi-linearly with the gate voltage at the saturation regime, considering th velocity saturation both in the channel and in the LDD region. The results are in good agreement with experimental data reported by others.