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곽성관(Sung Kwan Kwak),최광남(Kwang Nam Choi),이진민(Jin Min Lee),강창수(Chang Soo Kang),김동진(Dong Jin Kim),정관수(Kwan Soo Chung) 대한전자공학회 2006 대한전자공학회 학술대회 Vol.2006 No.11
Multilayer transparent electromagnetic wave shielding film with 1 m wide, was fabricated by using roll to roll DC plasma coating with ITO and Ag layer on PET substrate. By optimizing properly the design parameters, such as a processing condition, the surface resistance and the thickness of each layers, the homogeneous film could be obtained. Electromagnetic wave shielding film showed the high shielding effectiveness of 23㏈(99.5%) in 2-18 ㎓ range and the transmittance of 83.1% in 400-700㎚.
고분자 플라스틱 기판과 유리 기판위에 증착한 알류미늄 박막 특성 분석
이명재,곽성관,김동식,김장권,Lee, Myoung-Jae,Kwak, Sung-Kwan,Kim, Dong-Sik,Kim, Jang-Kwon 대한전자공학회 2002 電子工學會論文誌 IE (Industry electronics) Vol.39 No.2
플라스틱 기반 평판디스플레이 장치를 위한 Al 박막(1000-4000${\AA}$)을 직류-마그네트론 스퍼터링으로 유리 기판과 고분자 플라스틱 기판위에 증착하였다. 고분자 플라스틱 기판위에 증착된 Al박막의 전기적 특성을 향상시키고, 열 팽창을 줄이기 위하여 단계적 열 처리법을 사용하였다. 이러한 공정을 사용함으로써, 고분자 기판위에 증착된 박막의 크랙과 기판의 휨현상이 없는 Al 박막을 성공적으로 증착하였다. 또한, Al 박막의 열처리와 증착공정은 모두 200$^{\circ}C$ 이하에서 이루어 졌기 때문에, 이러한 저온 공정은 고분자 플라스틱 기판에 적용이 가능하다. Al 박막의 특성과 신뢰성을 조사하기 위하여 주사 전자 현미경(SEM), 원자력 현미경(AFM), X-선 회절 분석법(XRD)과 비저항등의 전기적 특성을 측정하였다. Al films (1000~4000${\AA}$)were deposited on glass and polymer(polyethersulfine) plastic substrates by DC-magnetron sputtering for plastic-based flat-panel displays. A stepped heating process was used both to improve the electrical characteristics and to diminish the thermal expansion of the polymer substrates. Following this procedure, we could succeed in sputtering Al films without any cracking or shrinkage of the polymer substrates. The treatment temperatures and deposited process of Al films were under 200$^{\circ}C$. Also, this low temperature fabrication process allows the application of plastic substrates. Scanning Electrom Microscopy, Atomic Force Microscopy, X-ray Dffractometry, and electrical measurements such as resistivity measurements were performed to investigate the properties of deposited the Al films and their reliability.?
Characteristics of Self assembled Monolayer as $Ta_2O_5$ Dielectric Interface for Polymer TFTs
최광남,곽성관,정관수,김동식,Choi, Kwang-Nam,Kwak, Sung-Kwan,Chung, Kwan-Soo,Kim, Dong-Sik The Institute of Electronics and Information Engin 2006 電子工學會論文誌. Journal of the institute of electronics Vol.43 No.1
중합 박막 트랜지스터의 특성은 유기 반도체에 앞서 게이트유전체 표면의 화학적 변형에 의해 조절 가능하다. 화학적 처리는 자기조립 단분자막 형태의 유전물질과 함께 파생된 tantalum pentoxide($Ta_2O_5$) 표면으로 구성된다. Octadecyl trichlorosilane(OTS), hexamethyldisilazane (HMDS), aminopropyltreithoxysilane(ATS) 자기조립 단분자막의 성장은 중합체로 결합된 poly-3-hexylthiophene(P3HT)의 분위기에서 $0.01\sim0.06cm2/V{\cdot}s$의 이동도로 진행되었다. 이동도 향상 메커니즘은 중합체와 자기조립 단분자막 사이의 분자 상호작용에 영향을 미치는 것으로 확인하였다. 이는 향후 ploymer TFT의 유전박막 중 하나로서 유용하게 사용 될 것이다. The characteristics of polymeric thin-film transistors(TFTs) can be controlled by chemically modifying the surface of the gate dielectric prior to the organic semiconductor. The chemical treatment consists of derivative the tantalum pentoxide($Ta_2O_5$) surface with organic materials to form self-assembled monolayer(SAM). The deposition of an octadecyl-trichlorosilane(OTS), hexamethy-ldisilazone(HMDS), aminopropyltreithoxysilane(ATS) SAM leads to a mobility of $0.01\sim0.06cm2/V{\cdot}s$ in a poly-3-hexylthiophene(P3HT) conjugated polymer. The mobility enhancement mechanism is likely to involve molecular interactions between the polymer and SAM. These result can be used for polymer TFT's dielectric material.
The characteristics of AINd thin film for TFT - LCD bus line
김동식(Dong-Sik Kim),곽성관(Sung Kwan Kwak),정관수(Kwan Soo Chung) 한국진공학회(ASCT) 2000 Applied Science and Convergence Technology Vol.9 No.3
TFT-LCD(thin film transistor-liquid crystal display) 패널의 데이터 배선 재료로 사용하기 위하여 AlNd(2 wt%) 의 Al합금 박막을 dc 마그네트론 스퍼터링 방법으로 유리 기판에 증착하여 열처리전과 열처리 후의 구조적, 전기적, 식각 박막 특성을 조사하였다. 또한 증착한 박막을 식각하여 그 특성을 조사하였고, ITO를 증착하여 AlNd과의 접촉 저항을 Kelvin resistor를 사용하여 측정하였다. 증착된 박막을 350℃에서 20분간 열처리하였을 때 AlW 박막은 비저항이 감소하였고 약 4 μΩ㎝의 아주 좋은 비저항 특성을 보였다. 주사전자 현미경(SEM)과 원자힘현미경(AFM)으로 표면을 분석한 결과 좋은 힐록방지 특성을 보임을 알 수 있었다. AlNd의 식각 특성은 아주 좋게 나타났고, ITO와 AlNd의 최저 접촉저항값은 약 110 μΩ㎝이었다. 측정된 특정들을 바탕으로 AlNd(2 wt.%) 박막의 적용 가능성을 해상도와 화면 크기 측면에서 살펴보았을 때,25언치 SXGA급 패널에 적용 가능함을 알 수 있었다. The structural, electrical and etching characteristics of Al alloy thin film with low impurity concentrations AlNd deposited by using dc magnetron sputtering deposition are investigated for the applications as gate bus line in the TFT-LCD panel. And ITO thin film was deposited on AlNd, then the contact resistance was measured by Kelvin resistor. The deposited thin films show the decrease of resistivity and the increase of grain size after the RTA at 300℃ for 20 min.. Moreover, the resistivity of AlNd does not show appreciable grain size dependence after RTA. It is concluded that the decrease of resistivity after RTA is due to the increase of grain size. The annealed AlNd is found to be hillock free. The etching profiles of AlNd was good and the minimun contact resistance was about 110 μΩ㎝. Caculation results reveal that the AlNd (2wt.%) thin film can be applicable to 25" SXGA class TFT-LCD panels.
비정질 실리콘의 자기정렬콘텍 (Self Aligned contact)에서 LPCVD 공정시간에 따른 특성 변화 연구
최광남(Kwang Nam Choi),곽성관(Sung Kwan Kwak),김동식(Dong Sik Kim),정관수(Kwan Soo Chung) 대한전자공학회 2006 대한전자공학회 학술대회 Vol.2006 No.11
The effects of processing time on the crystallization of the amorphous silicon for self aligned contact (SAC) pad deposited on the silicon substrate using low-pressure chemical vapor deposition (LPCVD) are presented in this paper. The amorphous silicon film is being subjected to processing time from 60 to 100 min for usual amorphous silicon growth. Usual processing lime of the amorphous silicon is 100 minutes, but we tried 60 minutes processing time to study the effect on the property of silicon. Transmission electron microscopy (TEM) shows that the crystallization of the amorphous silicon to poly silicon begins to occur for 60 min of LPCVD. The tendency to grow ploy crystalline silicon is likely due to the reduced surface oxidation during grain growth and crystallization at shorter processing time. Reduced contact resistance of the poly silicon contact pad was also measured for 60 min processing time. Our result will be beneficial to mass production companies. The detailed study of the structural, morphological and property changes of the amorphous silicon layer upon different processing time will be presented.
Investigation about Effect of Solvent Boiling Point on Electrical Properties of TIPS Pentacene OTFTs
김경석(Kyung-Seok Kim),정관수(Kwan-Soo Chung),곽성관(Sung Kwan Kwak),김영훈(Yong-Hoon Kim),한정인(Jeong-In Han) 대한전자공학회 2006 대한전자공학회 학술대회 Vol.2006 No.11
In this paper, we investigated the effect of solvent on electrical properties of triisopropylsilyl (TIPS) pentacene organic thin-film transistors (OTFTs). The TIPS pentacene was spin coated by using anisole, chlorobenzene, p-xylene, chloroform and toluene as solvent. Fabricated OTFT with anisole showed field-effect mobility of 0.02 ㎠/Vㆍs, on/off ratio 1.3×10³ and threshold voltage of 2.8 V. In contrast, with chloroform the mobility was 5.8×10?? ㎠/Vs, on/off ratio 1.1×10² and threshold voltage of 1.7 V.
DC magnetron 방법과 RF 스퍼터링 방법으로 제작된 Nickel Oxide 박막의 특성 연구
최광남(Kwang Nam Choi),박준우(Jun Woo Park),백승호(Seoung Ho Baek),이호선(Ho Sun Lee),곽성관(Sung Kwan Kwak),정관수(Kwan Soo Chung) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.7
We deposited nickel oxide(NiO) thin films on silicont'Si) substrates at Room temperature and 500℃ using a nickel target by reactive DC and RF sputtering. In addition, we anneal to NiO thin films deposited at room temperature. Using spectroscopic eillipsometry, we obtained optical characteristics of every films. We discussed relations of the optical and structural properties of NiO thin films with the oxygen flow rate, substrate temperature and annealing temperatures. Refraction was decreased and defect was increased when NiO thin films was annealed. We also analyzed the electrical characteristics of NiO films which deposited DC and RF sputtering method.
기판 종류와 전처리 방법에 따른 선택적 구리 박막 특성
곽성관,김동식,정관수 慶熙大學校 材料科學技術硏究所 1999 材料科學技術硏究論集 Vol.12 No.-
First, four different substrates, Si, SiO_(2), WN, and TiN, were used to examine the Cu deposition mechanism at the substrate surface. The initial stages of nucleation, density and grain size of the Cu thin film were investigated by performing the deposition at substrate temperatures ranging from 150 to 220℃ with a deposition time of 1 min. The results showed an increase in the Cu nuclei size with increasing deposition temperature for all four substrates. More specifically, WN and TiN substrates showed particle sizes at low temperature (150℃) which were significantly larger than for Si and SiO_(2) substrates nuclei sizes. Selective Cu deposition was achieved by depositing a TiN layer on a SiO_(2) substrate followed by patterning, thus creating two separate SiO_(2) and TiN surfaces. In order to study selective factors of Cu thin films, after SC1 cleaning, HF treatment and passivation treatment of the substrate, we have investigated deposition properties of selective Cu thin films. According to the pretreatment methods of the substrate surface, it showed very sensitive selective deposition properties from the experiment's result. Thus, from the above result, though Cu dry echting technique at room temperature is not yet developed, we could get some possibility to use Cu as semiconductor metallization.