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      • KCI등재

        ENEPIG 표면처리에서의 Sn-Ag-Cu 솔더조인트 신뢰성: 2. Pd 촉매 시간의 영향

        허석환,이지혜,함석진,Huh, Seok-Hwan,Lee, Ji-Hye,Ham, Suk-Jin 한국마이크로전자및패키징학회 2014 마이크로전자 및 패키징학회지 Vol.21 No.3

        솔더조인트의 신뢰성에는 인쇄회로기판의 표면처리 특성이 많은 영향을 미치고 있다. 본 연구에서는 ENEPIG 표면처리에서 Sn-4.0wt%Ag-0.5wt%Cu (SAC405) 솔더와 Pd 촉매 처리 시간에 따른 high speed shear 에너지 및 파괴 모드를 연구하였다. 또한 Pd 촉매 처리 시간과 무전해 Ni-P 도금의 표면 거칠기 (Ra)와의 관계를 규명하였다. Pd 촉매 처리 시간이 길어질수록 Ni-P nodule의 면적은 넓어지고, Ni-P 도금의 표면 거칠기 (Ra)는 감소한다. 이러한 영향으로 질산 기상 처리한 시편의 high speed shear 평가후 quasi-brittle과 brittle 모드의 점유율은 감소한다. 이는 Pd 촉매 처리 시간의 증가가 SAC405 솔더조인트의 신뢰도를 향상시키는 역할을 한다는 것을 나타낸다. The reliability of solder joint is significantly affected by the property of surface finish. This paper reports on a study of high speed shear energy and failure mode for Sn-4.0wt%Ag-0.5wt%Cu (SAC405) solder joints with the time of Pd activation. The nodule size of electroless Ni-P deposit increased with increasing the time of Pd activation. The roughness (Ra) of electroless Ni-P deposit decreased with increasing the time of Pd activation. Then, with $HNO_3$ vapor, the quasi-brittle and brittle mode of SAC405 solder joint decreased with increasing the time of Pd activation. This results indicate that the increase in the Pd activation time for Electroless Ni/ Electroless Pd/ Immersion Au (ENEPIG) surface finish play a critical role for improving the robustness of SAC405 solder joint.

      • KCI등재

        FC-BGA C4 bump의 신뢰성 평가에 따른 파괴모드 연구

        허석환,김강동,장중순,Huh, Seok-Hwan,Kim, Kang-Dong,Jang, Jung-Soon 한국마이크로전자및패키징학회 2011 마이크로전자 및 패키징학회지 Vol.18 No.3

        Flip Chip Ball Grid Array (FCBGA) 패키지의 솔더조인트 신뢰성을 평가하기 위한 방법으로는 다이 충격법, 다이 전단법, 3점 굽힘법, 열충격법 등이 활용된다. 본 연구에서는 솔더 접합부의 주요 고장메카니즘인 취성파괴를 확인하기 위한 방법으로 리플로우 상태, $85^{\circ}C$/85%RH 처리, $150^{\circ}C$/10hr 에이징의 처리한 후, 4가지 평가법으로 평가를 진행하여 파단모드를 분석하였다. 본 연구결과에서는 다이 충격법과 다이 전단법의 Good joint rate (GJR, %)는 리플로우 상태와 $85^{\circ}C$/85%RH처리에서 각각 89~91%와 100% 였으며, $150^{\circ}C$/10hr 에이징에서는 66%와 90%를 나타내었다. 3점 굽힘법과 열충격법의 GJR(%)는 3종류 샘플에서 모두 100%를 나타내어 변별력이 없었다. C4 솔더접합부의 신뢰성 평가법에 따른 GJR(%)의 변별력을 확인할 수 있는 방법은 die shock 과 die shear test였다. It is known that test methods to evaluate solder joint reliability are die shock test, die shear test, 3points bending test, and thermal shock test. The present study investigated the effects of failure mode on 3 types (as-reflowed, $85^{\circ}C$/85%RH treatment, and $150^{\circ}C$/10hr aging) of solder joints for flip-chip BGA package by using various test methods. The test methods and configurations are reported in detail, i.e. die shock, die shear, 3points bending, and thermal shock test. We focus on the failure mode of solder joints under various tests. The test results indicate that die shock and die shear test method can reveal brittle fracture in flip-chip ball grid array (FCBGA) packages with higher sensitivity.

      • KCI등재

        ENEPIG 표면처리에서의 Sn-Ag-Cu 솔더조인트 신뢰성: 1. 무전해 Ni-P도금의 두께와 표면거칠기의 영향

        허석환,이지혜,함석진,Huh, Seok-Hwan,Lee, Ji-Hye,Ham, Suk-Jin 한국마이크로전자및패키징학회 2014 마이크로전자 및 패키징학회지 Vol.21 No.3

        전자 제품의 경박 단소화 및 고집적화가 이루어 지면서 실리콘 집과 인쇄회로기판의 인터커넥션의 고신뢰도가 요구되고 있다. 본 연구는 Sn-4.0wt%Ag-0.5wt%Cu (SAC405) 솔더와 다양한 무전해 Ni-P 도금 두께에서의 high speed shear 에너지 및 파괴 모드를 연구하였다. 파괴 모드 분석을 위하여 집속이온빔(FIB) 분석이 이용되었다. 질산 기상 처리하지 않은 $1{\mu}m$ Ni-P 시편에서 낮은 shear 에너지가 나왔으며, 이는 솔더레지스트 선단에서 파단의 원인을 제공하는 것이 확인되었다. 질산 기상 처리한 시편에서 무전해 Ni-P 도금 두께가 커질수록 취성 파괴 모드는 감소한다. 또 Ni-P 도금 두께와 표면 거칠기(Ra)는 반비례 관계를 가진다. 이는 Ni-P 도금의 표면 거칠기를 낮추면 SAC405 솔더 조인트의 신뢰도를 향상시킨다는 사실을 나타낸다. By the trends of electronic package to be smaller, thinner and more integrative, the reliability of interconnection between Si chip and printed circuit board is required. This paper reports on a study of high speed shear energy of Sn-4.0wt%Ag-0.5wt%Cu (SAC405) solder joints with different the thicknesses of electroless Ni-P deposit. A high speed shear testing of solder joints was conducted to find a relationship between the thickness of Ni-P deposit and the brittle fracture in electroless Ni-P deposit/SAC405 solder. A focused ion beam (FIB) was used to polish the cross sections to reveal details of the microstructure of the fractured pad surface with and without $HNO_3$ vapor treatment. The high speed shear energy of SAC405 solder joint with $1{\mu}m$ Ni-P deposit was found to be lower without $HNO_3$ vapor, compared to those of over $3{\mu}m$ Ni-P deposit. This could be due to the edge of solder resist in $1{\mu}m$ Ni-P deposit, which provides a fracture location for the weakened shear energy of solder joints and brittle fracture in high speed shear test. With $HNO_3$ vapor, the brittle fracture mode in high speed shear test decreased with increasing the thickness of Ni-P deposit. Then the roughness (Ra) of Ni-P deposits decreased with increasing its thickness. Thus, this gives the evidence that the decrease in roughness of Ni-P deposit for Eelectroless Ni/ Electroless Pd/ Immersion Au (ENEPIG) surface play a critical role for improving the robustness of SAC405 solder joint.

      • KCI등재

        고온고습 전압인가(Biased HAST) 시험에서 인쇄회로기판의 이온 마이그레이션 불량 메커니즘

        허석환,신안섭,함석진,Huh, Seok-Hwan,Shin, An-Seob,Ham, Suk-Jin 한국마이크로전자및패키징학회 2015 마이크로전자 및 패키징학회지 Vol.22 No.1

        전자 제품의 경박 단소화 및 고집적화가 이루어 지면서 반도체 칩뿐만 아니라 유기 기판도 고집적화가 요구되고 있다. 본 연구는 인쇄회로기판의 미세 피치 회로에 대한 고온고습 전압인가 시험을 실시하여 불량 메커니즘을 연구하였다. $130^{\circ}C/85%RH/3.3V$와 $135^{\circ}C/90%RH/3.3V$ 시험조건에서 고온고습 전압시험(Biased HAST)의 가속 계수는 2.079로 계산되었다. 불량 메커니즘 분석을 위하여 집속이온빔(FIB) 분석이 이용되었다. (+)전극에서는 콜로이드 형태의 $Cu_xO$와 $Cu(OH)_2$가 형성되었으며, (-)전극에서는 수지형태의 Cu가 관찰되었다. 이를 통해 $Cu^{2+}$ 이온과 전자($e^-$)가 결합한 수지상 Cu에 의해 절연파괴가 일어난다는 것을 확인하였다. By the trends of electronic package to be smaller, thinner and more integrative, organic printed circuit board is required to be finer Cu trace pitch. This paper reports on a study of failure mechanism for PCB with fine Cu trace pitch using biased HAST. In weibull analysis of the biased HAST lifetime, it is found that the acceleration factor (AF) of between $135^{\circ}C/90%RH/3.3V$ and $130^{\circ}C/85%RH/3.3V$ is 2.079. A focused ion beam (FIB) was used to polish the cross sections to reveal details of the microstructure of the failure mode. It is found that $Cu_xO/Cu(OH)_2$ colloids and Cu dendrites were formed at anode (+) and at cathode (-), respectively. Thus, this gives the evidence that Cu dendrites formed at cathode by $Cu^{2+}$ ion migration lead to a short failure between a pair of Cu nets.

      • KCI등재

        고온고습 전원인가 시험에서 Cl에 의한 이온 마이그레이션 불량

        허석환,신안섭,Huh, Seok-Hwan,Shin, An-Seob 대한용접접합학회 2015 대한용접·접합학회지 Vol.33 No.3

        By the trends of electronic package to be more integrative, the fine Cu trace pitch of organic PCB is required to be a robust design. In this study, the short circuit failure mechanism of PCB with a Cl element under the Temperature humidity bias test ($85^{\circ}C$/85%RH/3.5V) was examined by micro-structural study. A focused ion beam (FIB) and an electron probe micro analysis (EPMA) were used to polish the cross sections to reveal details of the microstructure of the failure mode. It is found that $CuCl_x$ were formed and grown on Cu trace during the $170^{\circ}C$/3hrs and that $CuCl_x$ was decomposed into Cu dendrite and $Cl_2$ gas during the $85^{\circ}C$/85%RH/3.5V. It is suggested that Cu dendrites formed on Cu trace lead to a short circuit failure between a pair of Cu traces.

      • KCI등재

        반도체 배선용 구리 도금층의 미세조직 및 전기비저항 고찰

        허석환 ( Seok Hwan Huh ),전형진 ( Hyoung Jin Jeon ),추현수 ( Hyun Soo Chu ),송영석 ( Young Seok Song ),이성근 ( Sung Keun Lee ),이효종 ( Hyo Jong Lee ),이의형 ( Ui Hyoung Lee ) 대한금속재료학회(구 대한금속학회) 2014 대한금속·재료학회지 Vol.52 No.11

        Copper electrodeposits annealed at 80 ℃ were investigated by electrical resistance measurement, X-ray diffraction and electron backscattered diffraction analyses. The decrease of electrical resistivity had a linear relationship with the re-crystallized area. Interestingly, the texture coefficient of (200) orientation increased as the re-crystallization occurred. Such appearance of (200) texture during annealing seemed to be related to the residual strain in the copper electrodeposits. It is possible to evaluate the progress of grain growth by measuring the electrical resistivity or texture coefficient in copper electrodeposits. (Received July 23, 2013)

      • KCI등재

        Biased HAST 시험에서의 인쇄회로기판 수명 예측

        허석환(Seok-Hwan Huh) 대한용접·접합학회 2018 대한용접·접합학회지 Vol.36 No.2

        By the trends of electronic package to be high performance and high integrative, build-up printed circuit boards (PCBs) are required to be highly integrated circuits and highly reliable circuits. PCBs are subjected to varying temperature and moisture exposures throughout whole their lives. This paper reports on the lifetime predictions of printed circuit boards under biased highly accelerated stress testing (HAST). In the failure analysis, it is found that porous CuxO colloids and Cu dendrites were formed at anode (+) trace and at cathode (-) trace, respectively. It is clear that the failure mechanism of the test legs is Cu corrosion, Cu ionmigration, and Cu metallization between a couple of test traces. The median lives of the test legs were calculated by the log-normal distribution. Based on the failure mechanism, the lifetime model for temperature and humidity stress is assumed to be a modified Peck model. We obtained the lifetime’s equation using the time to failure of the biased HAST, the median lifetime in the user condition was calculated as 19,321 years and 95% confidence interval (42876.9, 8706.7).

      • KCI등재

        광 PCB의 광 회로층 제작 및 패키징 기술

        김태훈,허석환,정명영,Kim, Taehoon,Huh, Seok-Hwan,Jeong, Myung Yung 한국마이크로전자및패키징학회 2015 마이크로전자 및 패키징학회지 Vol.22 No.1

        Recently, data throughput of smart electric devices increases dramatically. There is a great interest in a new technology which exceeds the limit of electrical transmission method. Optical PCB can supplement the weakness of electrical signal processing, the research for optical PCB is very active. In this paper, we propose the thermal imprint lithography process to fabrication optical layer of optical PCB and experiment to optimize the process conditions. We confirm process time, pressure, process temperature, demolding temperature and fabricate optical interconnection structure which has $45^{\circ}$ tilted mirror surface for confirm the interconnection efficiency.

      • KCI등재

        무전해 Ni-P 두께와 Assembly Process가 Solder Ball Joint의 신뢰성에 미치는 영향

        이지혜,허석환,정기호,함석진,Lee, Ji-Hye,Huh, Seok-Hwan,Jung, Gi-Ho,Ham, Suk-Jin 대한용접접합학회 2014 대한용접·접합학회지 Vol.32 No.3

        The ability of electronic packages and assemblies to resist solder joint failure is becoming a growing concern. This paper reports on a study of high speed shear energy of Sn-4.0wt%Ag-0.5wt%Cu (SAC405) solder with different electroless Ni-P thickness, with $HNO_3$ vapor's status, and with various pre-conditions. A high speed shear testing of solder joints was conducted to find a relationship between the thickness of Ni-P deposit and the brittle fracture in electroless Ni-P deposit/SAC405 solder interconnection. A focused ion beam (FIB) was used to polish the cross sections to reveal details of the microstructure of the fractured pad surface with and without $HNO_3$ vapor treatment. A scanning electron microscopy (SEM) and an energy dispersive x-ray analysis (EDS) confirmed that there were three intermetallic compound (IMC) layers at the SAC405 solder joint interface: $(Ni,Cu)_3Sn_4$ layer, $(Ni,Cu)_2SnP$ layer, and $(Ni,Sn)_3P$ layer. The high speed shear energy of SAC405 solder joint with $3{\mu}m$ Ni-P deposit was found to be lower in pre-condition level#2, compared to that of $6{\mu}m$ Ni-P deposit. Results of focused ion beam and energy dispersive x-ray analysis of the fractured pad surfaces support the suggestion that the brittle fracture of $3{\mu}m$ Ni-P deposit is the result of Ni corrosion in the pre-condition level#2 and the $HNO_3$ vapor treatment.

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