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목적 코드에서 LNOP 코드가 제거됨에 따른 SVLIW 구조의 성능 향상
정보윤(Jeong Bo Yun),전중남(Jeon Joong Nam),김석일(Kim Suk Il) 한국정보처리학회 1997 정보처리학회논문지 Vol.4 No.9
SVLIW(Superscalar VLIW) processor, a family of VLIW processors schedules very long instruction words ar runtime. If a very long instruction word that is to be issued occurs data dependence relations and/or resource conflicts with those words that were under execution, a long NOP word is issued instead of the word until all the data dependence relations and/or resource conflicts have been resolved. Thus, LNOPs can be removed in object codes for SVLIW processor. In this paper, we measure an improvement of the cache hit ratio caused by removing LNOPs in the object code. We also analyze an improvement of the processor performance due to higher cache hit ratio of the processor. Benchmark tests promise that the performance of SVLIW processors is improved more than 5% compared with that of traditional VLIW processors.