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최근 광통신용 반도체 소자 및 장치의 연구개발에 관한 동향
성만영 대한전기학회 1984 전기의 세계 Vol.33 No.2
본고의 내용은 다음과 같다. 1. 반도체 레이저 2. 발광 다이오드 3. 광검출기 4. 광 파이버의 전송로 5. 광회로 6. 집적광 디바이스의 시작
半導體素子의 高周波特性 向上策 樹立을 위한 새로운 電界效果 트랜지스터의 開發에 관한 硏究
成萬永 단국대학교 1982 論文集 Vol.16 No.-
A technique has been proposed for fabricating a submicronchannel Vertical V-groove field effect transistor (V-groove FET) using silicon batch processing techniques and standard photolithgraphy. The short channel length of this device is expected to make it useful for microwave applications as well as for high speed integrated circuits. The fabrication procedure is easily modified for use with compound semiconductors to take advantage of the higher mobilities and greater carrier velocities available in other materials. The fabrication procedure makes use of an anisotropically etched V-groove into a (100)p type silicon region grown on an n-silicon substrate to delineate the source of the Junction type V-groove FET. The V-groove etch is designed to be selfterminating when the distance from the bottom of the groove to the pn junction interface reaches a specified submicron value. The distance will be the channel length of the completed junction type V-groove FET. A subsequent donor diffusion into the surface of the etched groove creates the n-type channel between the source and the substrate. Metal contact at the surface of the p-region serves as the gate terminal while contacts at the V-groove surface and the substrate form the source and drain terminals, respectively. A finite-element numerical simulation of the junction type V-groove FET operation was performed using a FORTRAN program run on a Cyber-174 computer. The program alternaly solves Poisson's equation and the electron and hole continuity equations over the region of interest with mixed Dirichlet and Neumann boundary conditions until a steady-state solution is reached Low-frequecny output characteristics of the device were deduced by varying the gate and drain voltage boundary conditions over many program runs. A technique was proposed for fabricating the p n V-groove JEFT structure. This technique would utilize an anisotropic etch through a p-region into the n-substrate followed by an n-type epitaxial regrowth step in the faces of the V-groove to create the V-groove FET channel. The numerical simulation predicts a higher transconductance for this structure. The lack of adequate epitaxial facilities precluded the fabrication and evaluation of such a structure. As the results of the experimental fabrication, the microwave V-groove FETs are obtained. The cut off frequencies are calculated to be 56㎓ by Linvill's power gain equation using the measured capacitance and transconductance.