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NPC 멀티레벨 인버터의 고조파 분석 및 출력 필터 설계
김수홍,김윤호,방상석,김광섭 전력전자학회 2006 전력전자학회 논문지 Vol.11 No.2
In this paper, LC output filters are designed to reduce output harmonics and harmonic analysis are performed. Generally, multilevel inverters are used in high power application and operates with low switching frequency, which, in turn, generates large output harmonics. Output filters are used to reduce output harmonics. The design approach to reduce output harmonics of the 3level multilevel inverter is discussed and DSP(TMS320C31) is used for the digital control of the system. the design example is given. The designed system is verified by simulation and experiment. 본 논문은 단상 멀티레벨 인버터의 LC출력 필터 설계와 변조비에 따른 고조파 분석을 수행하였다. 일반적으로 고전력 응용에 적합한 멀티레벨 인버터는 낮은 스위칭 주파수하에서 구동되므로 출력단에 큰 고조파 성분을 포함하게 된다. 이를 감소시키기 위해 출력단에 필터를 삽입하는 방법이 효과적이다. 3레벨 NPC 멀티레벨 인버터의 출력단 고조파를 감소시키기 위한 필터 설계 방안을 검토하고, 디지털 제어 방식을 위해 DSP(TMS320C31)를 사용하였다. 또한 필터의 설계예시를 보였고, 설계된 시스템의 타당성을 시뮬레이션과 실험을 통해 입증하였다.
고전압 펄스 발생 장치의 관한 부하의 변화를 고려한 펄스회로의 이론적 연구
김영주(Young-Ju Kim),방상석(Sang-Seok Bang),이채한(Chae-Han Lee),김상현(Sang-Hyun Kim) 한국조명·전기설비학회 2016 조명·전기설비학회논문지 Vol.30 No.3
The high-voltage pulse generator consists of transformers of fundamental wave and harmonic waves, and shunt capacitors. The pulse has the fundamental wave and the harmonic waves that have been as a series circuit by the transformers to make high voltage pulse. This paper shows that pulse generator circuit is analyzed by using transformer equivalent circuits with the effect of load and simulated in time domain using Matlab program. The output voltage of pulse were obtained to 2.5kHz, 2.0kV. In high voltage circuit, capacitors are related to frequency band pass characteristics. Also, it is shown that the voltage of output pulse increases according to the growth of load.
김광섭(Kwang-Seob Kim),방상석(Sang-Suk Bang),권병기(Byung-Ki Kwon),문상호(Sang-Ho Moon),양병훈(Byung-Hun Yang),이명준(Myung-Jun Lee),최창호(Chang-Ho Choi) 전력전자학회 2006 전력전자학술대회 논문집 Vol.- No.-
We introduce 2[MVA] 3300[V] 7-level voltage source inverter system developed by POSCON and describe the main characteristics of inverter system, i.e. PWM converter, H-bridge power module, phase shifted carrier PWM. The P주 converter is a three-phase boost converter, which operates in a 4-quadrant and in a nearly unit displacement power factor. Experimental waveforms are also presented to verify the proposed method and performance of the developed system.
H-Bridge 7레벨 인버터를 이용한 유도전동기 구동시스템의 노이즈 저감을 위한 출력 필터설계
김수홍,안영오,김윤호,방상석,김광섭,Kim, Soo-Hong,Ahn, Young-Oh,Kim, Yoon-Ho,Bang, Sang-Seok,Kim, Kwang-Seob 한국조명전기설비학회 2006 조명·전기설비학회논문지 Vol.20 No.3
일반적으로 PWM인버터에 발생된 고조파와 노이즈는 스위칭 주파수, dv/dt와 di/dt, PWM 스위칭 방법에 의해 영향을 받는다. 멀티레벨 인버터가 고전력 시스템에 적용되어 낮은 주파수에서 동작할 때 이것은 큰 고조파 성분과 노이즈를 발생하게 된다. 따라서 멀티레벨 인버터에 출력 필터가 요구된다. 본 논문에서는 H-bridge 7레벨 인버터 시스템을 사용한 3상 유도 전동기 구동 시스템의 고조파와 노이즈 감소를 위해 출력 필터를 설계하였다. 가격이 저렴하고 간단한 구조를 가지며, 고조파와 노이즈를 효과적으로 감소시킬 수 있는 수동필터는 멀티레벨 인버터 시스템을 사용한 3상 유도전동기 구동시스템에 적용되었다. 설계된 시스템은 향상되었고, 시뮬레이션과 실험을 통해 그 타당성을 증명하였다. In general, the generated harmonics and noise of the PWM inverter are affected by PWM switching method, switching frequency, dv/dt and di/dt. Since multilevel inverters are often applied to the high power system, and operates with low switching frequency, theyproduce large size of harmonic contents and noise. Thus it is necessary to install output filters in the multilevel inverter. In this paper a filter design approach for the harmonic and noise reduction the three phase induction motor driving system using H-bridge 7-level inverter system is presented. The passive filter that has low cost and simple structure and can effectively reduce harmonics and noise, is designed and applied to the three phase induction motor drive having multilevel inverter system. The designed system is implemented and verified by simulation and experiments.
3-레벨 인버터 공간벡터 변조시의 중성점 전위 변동 보상법
서재형(Jae Hyeong Seo),김광섭(Kwang Seob Kim),방상석(Sang Seok Bang),최창호(Chang Ho Choi) 전력전자학회 2001 전력전자학술대회 논문집 Vol.2001 No.7
In performing the three-level SVPWM, it is nearly impossible to control the neutral-point potential exactly to the half of the dc-link voltage at all times. Therefore the inverter would produce an erroneous output voltage by this voltage unbalance. So the voltage unbalance has to be compensated in doing PWM, when the voltage unbalance occurs whether it is small or large, to make the inverter output voltage follow the reference voltage exactly the same. In this paper, a new compensating method for the neutral-point potential variation in a three-level inverter space vector PWM CSVPWM) is presented. By using the proposed method, the output voltage of the inverter can be made same as the reference voltage and thus the current and torque ripple of the inverter driven motor can be greatly improved even if the voltage unbalance is quite large. The proposed method is verified experimentally with a 3-level IGBT inverter.
멀티레벨 인버터를 이용한 3상 유도전동기 구동 시스템의 EMI 필터 설계
金倫鎬(Yoon-Ho Kim),金洙弘(Soo-Hong Kim),安永五(Young-Oh Ahn),方相石(Sang-Seok Bang),金光燮(Kwang-Seob Kim) 대한전기학회 2006 전기학회논문지 B Vol.55 No.5
In this paper EMI problems with induction motor drive system using multi-level inverters are investigated. The high power multi-level inverter usually operates with low switching frequency and produces large noises. Generally, EMI consists of the conduction component through source lines and emission component emitted to the space. This conduction component can be classified to the common-mode between source line and ground, and the normal-mode between lines. The EMI filters for the induction motor drive system are designed and implemented to reduce EMI noise. Finally the designed system is verified by the experiment. The experimental results show that both the normal mode and common mode noises are greatly reduced compared to the system without filters.
김민규(M.K. Kim),김재식(J.S. Kim),방상석(S.S. Bang),최재호(J.H. Choi) 전력전자학회 2003 전력전자학술대회 논문집 Vol.2003 No.7(2)
This paper describes the PWM-VSI controller of three-phase UPS system using stationary reference frame This controller meets the specification the UPS inverter output voltage even under the unbalanced or nonlinear load. This controller is also constructed with duble control loop of the outer voltage control loop and the inner current control loop For the fast response of the output voltage control, yhr inner current control loop of the capacotor current os used To get the good property against overshoot, the IP controller us used. The outer voltage controller IS designed with P controller and the high gain transfer function is used for the zero steady state error. All control gains of both controller is designed base on the CDM method