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For the planned and systematic development m central areas of Korean established cities, reform measures of the building code were analyzed and surveyed, and Pusan is the sample of this study The results are follows 1) Only used $quot;the general commercial zone$quot; without appling detailed zone makes unreasonable result when building on Urban Central District 2) The unplanned and mixed usage development of building make the problem of reflecting local charter in Urban Central District 3) It seems reasonable that the building coverage must be down to a quarter of the present 1,300, that the incentives must be provided efficiently when open space is confirmed or urban designs, and that detailed planning system in urban design's must be operated 4) The height limitations must be avoided from the uniform regulations by width of front roads And that must be variously applied to each zones The present building codes have the problems of adaptation to the rapidly changing urban circumstances Therefore, the system of the present building codes must be revised for harmony with 21st century's architectural culture.
The purpose of this study is to compare building laws as io building types and density control though analyzing the relations among Korea, Japan, Germany, America(New York) about architecture planning m urban central district. 1) It is unreasonable that the similar items of bulldog low which have limitation of road width, and building coverage ratio and bulk ratio according to usa zoning, are forced irrespective of individual environment. 2) The budding law in Japan, which has simailar aspects such as building density and form restriction, is applied according to character of distracts. In Germany, B-Plan made by combing building density and form restriction such as budding story/buiding coverage ratio/bulk ratio, is used. More practical enforcement n New York is done by sectioning into commercial districts. 3) As analyzed above, it is necessary to reflect characteristics of distract and improve urban landscape.
In this paper, CP/M-KNET (network OS) is designed for implementation of local network between the microcomputers. And also INA (Intelligent Network Adaptor) is designed for local network with bus topology. Using this network system with two node the distributed computation speed up about 1.5.
In this paper, CP/M-KNI(network O.S) is designed for implementation of local network between the CP/M-Based computers. And also INA (Intellegent Network Adaptor) is designed for local network with point to point mesh topology. INA used BSC protocol, RS-232C connection with 500 kbps transfer speed and parallel interface to CP/M-Based computer.
In this paper, the purpose of implementing the network system is ⅰ) to utilize effectively microcomputers ⅱ) to share their hardwares and softwares ⅲ) to reduce the execution time by parallel computation. Therefore in order to implement the network structure for these purposes, Intelligent Network Unit (INU) has been designed and the network operating system has been developed. This INU which uses CSMA/CD bus access scheme and HDLC protocol with data transfer rate of 614 Kbps is connected to the nodes with RS-232C interface. In order to control this network effectively, a network operating system for 8 bit microcomputer which is named as CP/M-KNET has been developed and MS-DOS for 16 bit microcomputers has been modified and included the RS-232C and Keyboard hardware interrupt service routines. Since the control program CP/M-KNET could be programmed in a ROM, it could be used in any microcomputers which had no disk drive. To test the performance of parallel computation, matrix multiplication programs have been executed in this network system. Measured speedups in the parallel computation of matrix multiplications were 1.70∼1.81 and 2.86∼3.22 for the cases of 2 and 4-microcomputers in this system, respectively.
The response analysis in the optimal design of complicated electronic circuits requires large memory capacity and considerable length of time. In this paper, in order to enhance the efficiency of memory capacity and the excuting time, SPARSE matrix is applied to the solution of simultaneous equations required for the analysis of electronic circuits. An equalizer amplifier is designed by this optimal design program.
The purpose of parallel processing system is to improve the processing time. The interconnection network is an integral part of parallel processing system. Therefore in recent years, the multistage interconnection networks have been the object of intense research. In this paper, properties and architecture of parallel processing system and operation mode, control strategy, switching method and topology of multistage interconnection network have been investigated. To simulation of the performance of circuit swiching multistage interconnection network, rerouting model for ADM (Augmented Data Manipulator) networks and countout(i) model for generalized cube networks have been proposed and used. Results of performance evaluation prove that the rerouting model for ADM network and the countout(i) model for generalized cube network are better than that of drop and hold models.