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60 GHz 대역 신호 무결성을 위한 플립 칩 구조 최적화
감동근(Dong Gun Kam) 한국전자파학회 2014 한국전자파학회논문지 Vol.25 No.4
일반적으로 플립 칩은 와이어 본딩에 비해 신호 무결성을 저해하는 기생 성분이 작지만, 60 GHz 대역에서는 설계하기에 따라서 2 dB 이상의 삽입 손실 차이가 난다. 본 논문에서는 플립 칩 구조의 여러 설계 변수들에 따라 삽입 손실이 어떻게 변하는 지를 분석함으로써 설계를 최적화하는 방법을 제시한다. Although flip-chip interconnects have smaller parasitics than bonding wires, they should be carefully designed at 60 GHz. Insertion loss at a flip-chip transition may differ as much as 2 dB depending on design parameters. In this paper we present a comprehensive sensitivity analysis to optimize the flip-chip transition.
유슬기,감동근 한국전자파학회 2022 Journal of Electromagnetic Engineering and Science Vol.22 No.3
Asymmetry in a differential pair leads to deterioration of signal integrity. Differential pairs on a meshed ground often encounter asymmetry in return current paths. In this paper, we propose an offset mesh as an improved mesh structure that offsets asymmetry between a solid region and an aperture region. The offset mesh mitigates the asymmetry in the conventional mesh structure without additional design elements. The proposed structure has been verified to be effective in reducing mode conversion, intra-pair and inter-pair skews, and characteristic impedance variation in the time and frequency domains. This enables high-density routing of differential pairs.
프리프레그 가공을 통한 인쇄회로 기판의 유효 유전상수 하향 조정
양원모,감동근 한국전자파학회 2020 한국전자파학회논문지 Vol.31 No.6
As electronic devices become more compact, the thickness of the layer in printed circuit boards(PCBs) decreases, and the characteristic impedance of transmission lines with a minimum allowable trace width often becomes less than 50 Ω. Reducing the minimum trace width or switching to a dielectric with lower dielectric constant is prohibitive owing to increased manufacturing costs. We propose a new way of reducing the effective dielectric constant by drilling holes in prepreg. We perform measurements and simulations to verify the effectiveness of the proposed approach. Results demonstrate that using drilled prepreg enables the lowering of the effective dielectric constant by up to 7 %.
김상우,감동근,정승부,Kim, Sang-Woo,Gam, Dong-Gun,Jung, Seung-Boo 한국마이크로전자및패키징학회 2017 마이크로전자 및 패키징학회지 Vol.24 No.3
열 소결 공정 중 소결 온도와 시간을 다르게 하여 제작된 은 인쇄회로의 전기적 거동과 유연성을 분석하였다. 은 인쇄회로의 비저항값과 고주파 전송 특성을 4-포인트 프로브 및 네트워크 분석기를 사용하여 각각 측정하였다. 비저항값은 DC 전류가 회로에 흐를 때의 전기 저항을, 고주파 전송 특성은 은 회로의 신호 전송 특성을 의미한다. 은 인쇄회로의 유연성은 IPC 슬라이딩 테스트 중 발생하는 회로 저항의 변화를 실시간으로 측정하여 평가하였다. 은 인쇄회로의 파괴 모드는 주사전자 현미경과 광학 현미경을 통해 관측하였다. 폴리이미드 기판 위에 인쇄된 은 회로의 비저항값은 소결 온도와 소결 시간이 증가함에 따라 급격하게 감소하였다. $250^{\circ}C$에서 45분간 열 소결된 은 인쇄회로의 비저항값이 가장 낮았으며 그 때의 값은 $3.8{\mu}{\Omega}{\cdot}cm$였다. 은 인쇄회로에서 발생한 균열은 슬라이딩 테스트 10만번 이후의 길이가 2.5만번 테스트 후의 균열보다 열 배는 더 길게 측정되었다. 측정된 전송계수와 반사계수는 전산모사 결과와 그 경향이 거의 일치하였으며 슬라이딩 테스트가 진행될수록 은 회로의 전송손실은 증가하였다. The electrical behavior and flexibility of the screen printed Ag circuits were investigated with infrared radiation sintering times and sintering temperatures. Electrical resistivity and radio frequency characteristics were evaluated by using the 4 point probe measurement and the network analyzer by using cascade's probe system, respectively. Electrical resistivity and radio frequency characteristics means that the direct current resistance and signal transmission properties of the printed Ag circuit. Flexibility of the screen printed Ag circuit was evaluated by measuring of electrical behavior during IPC sliding test. Failure mode of the Ag printed circuits was observed by using field emission scanning electron microscope and optical microscope. Electrical resistivity of the Ag circuits screen printed on Pl substrate was rapidly decreased with increasing sintering temperature and durations. The lowest electrical resistivity of Ag printed circuit was up to $3.8{\mu}{\Omega}{\cdot}cm$ at $250^{\circ}C$ for 45 min. The crack length arisen within the printed Ag circuit after $10{\times}10^4$ sliding numbers was 10 times longer than that of after $2.5{\times}10^4$ sliding numbers. Measured insertion loss and calculated insertion loss were in good agreements each other. Insertion loss of the printed Ag circuit was increased with increasing the number of sliding cycle.
60 GHz 개구면 결합 패치 안테나의 기판 위치에 따른 이득 변화 및 주기적 특성
서해교,홍원빈,감동근 한국전자파학회 2019 한국전자파학회논문지 Vol.30 No.10
In this paper, the gain variation of a 60 GHz aperture-coupled patch antenna that is dependent on the position on the ground plane is investigated. Despite using the same antenna, the antenna gain is varied as a function of the antenna position on the ground plane with a constant size. The period of gain variation is approximately 0.9λ and the amplitude is fixed with approximately 5 dB. Twenty fabricated test vehicles were measured and compared with simulation results using HFSS software; the measurement and simulation results show adequate agreement. The printed circuit board (PCB) thickness and dielectric constant strongly affect the period of the gain variation.