금속박막증착 ( Metal thin film deposition ) 시 두께 조절

장지근 대한전자공학회 1978 대한전자공학회 심포지엄 논문집 Vol.- No.-

高低接合 에미터 構造를 갖는 N^+ NPP^+ Si 太陽電池의 效率改善

張志根 단국대학교 1984 論文集 Vol.18 No.-

N^+NPP^+ HLEBSF(high low emitter back surface field) solar cells which have N^+N high low junction in the emitter as well as N^+PP^+ BSF cells were designed and fabricated by using <111> oriented P type Si wafers with the resistivity of 10Ω-㎝ and the thickness of 13∼15mil. Physical parameters (impurity concentration, thickness) at each region of N^+PP^+ and N^+NPP^+ cell were made equally through same masks and simultaneous process except N region of HLEBSF cell to investigate the high low emitter junction effect for efficiency improvement. Under the light intensity of 100㎽/㎠, total area (active area) conversion efficiency were typically 10.94%(12.16%) for N^+PP^+ BSF cells and 12.07%(13.41%) for N^+NPP^+ cells, Efficiency improvement of N^+NPP^+ cell which has high low emitter junction structure is resulted from the suppression of emitter recombination current and the increasement of open circuit voltage(V_(oc))and short circuit current(I_(sh)) by removing heavy doping effects occurring in N^+ emitter region.

고휘도 녹색 인광 OLED 제작에서 전자수송층 처리

장지근,김원기,신상배,신현관,Jang, Ji-Geun,Kim, Won-Ki,Shin, Sang-Baie,Shin, Hyun-Kwan 한국반도체디스플레이기술학회 2008 반도체디스플레이기술학회지 Vol.7 No.3

New devices with structure of ITO/2TNATA/NPB/TCTA/CBP:7%Ir(ppy)$_3$/BCP/ETL/LiF/Al were proposed to develop high luminous green phosphorescent organic light emitting diodes and their electroluminescent properties were evaluated. The experimental devices were divided into two kinds according to the material ($Alq_3$ or SFC137) used as an electron transport layer (ETL). Luminous intensities of the devices using $Alq_3$ and SFC137 as electron transport layers were 27,500 cd/$m^2$ and 51,500 cd/$m^2$ at an applied voltage of 9V, respectively. The current efficiencies of both devices were similar as 12.6 cd/A under a luminance of 10,000 cd/$m^2$, while showed slower decay in the device with SFC137 as an ETL according to the further increase of luminance. Current density and luminance of the device with SFC137 as an electron transport layer were higher at the same voltage than those of the device with $Alq_3$ as an ETL.

Co/Ti 이중막 실리사이드 접촉을 갖는 p$^{+}$-n 극저접합의 형성

장지근,엄우용,신철상,장호정 대한전자공학회 1998 電子工學會論文誌, D Vol.d35 No.5

Ultr shallow p$^{+}$-n junction with Co/Ti bilayer silicidde contact was formed by ion implantation of BF$_{2}$ [energy : (30, 50)keV, dose:($5{\times}10^{14}$, $5{\times}10^{15}$/$\textrm{cm}^2$] onto the n-well Si(100) region and by RTA-silicidation and post annealing of the evaporated Co(120.angs., 170.angs.)/Ti(40~50.angs.) double layer. The sheet resistance of the silicided p$^{+}$ region of the p$^{+}$-n junction formed by BF2 implantation with energy of 30keV and dose of $5{\times}10^{15}$/$\textrm{cm}^2$ and Co/Ti thickness of $120{\AA}$/(40~$50{\AA}$) was about $8{\Omega}$/${\box}$. The junction depth including silicide thickness of about $500{\AA}$ was 0.14${\mu}$. The fabricated p$^{+}$ -n ultra shallow junction depth including silicide thickness of about $500{\AA}$ was 0.14${\mu}$. The fabricated p$^{+}$-n ultra shallow junction with Co/Ti bilayer silicide contact did not show any agglomeration or variation of sheet resistance value after post annealing at $850^{\circ}C$ for 30 minutes. The boron concentration at the epitaxial CoSi$_{2}$/Si interface of the fabricated junction was about 6*10$6{\times}10^{19}$ / $\textrm{cm}^2$..

Al-nSi 쇼트키 다이오드의 접합면 주위의 얇은 계단형 산화막 구조가 항복 전압에 미치는 영향

장지근,김봉렬 대한전자공학회 1983 전자공학회지 Vol.20 No.3

종래의 쇼트키 다이오드들이 가지는 금속중첩 및 P보호환 구조와 비교하여 금속-반도체 접합면 가장자리에 얇은 계단형 산화막(약1000Å) 구조를 갖는 새로운 소자들을 설계 제작하였다. 별은 계단형 산화막의 형성은 T.C.E. 산화공정으로 처리하였으며 이러한 새로운 소자들의 항복현상을 비교 검토하기 위하여 이들과 함께 동일한 소자 크기를 갖는 종래의 금속 중첩 쇼트키 다이오드와 P보호환 쇼트키 다이오드를 같은 폐이퍼상에 집적시켰고 항복전압에 대한 측정을 통해 고찰해 본 결과 금속-반도체 접합면 가장자리에 얇은 계단형 산화막 구조를 갖는 소자들은 종래의 쇼트키 다이오드들에 비해 항복현상에 있어서 월등한 개선을 보여 주는 것으로 나타났다. New Schottky devices with thin stepped oxide layer (about 1000 ${\AA}$) along the edge of metal-semiconductor junction have been designed and fabricated. The breakdown voltages of these diodes have been compared with those of conventional metal overlap and P guard ring Schottky diode structures. Thin stepped oxide layer has been grown by the process of T.C.E. oxidation. In order to compare and demonstrate the improved down phenomena of these devices, conventional metal overlap diode and P guard ring which have the same dimension with new devices have also been integrated in a same New Schottty devices structured with thin stepped oxide layer have shown significant improvement in breakdown phenomena compared with conventional diodes.

고저 접합 에미터 구조를 갖는 $N^+NPP^+$ Si 태양전지의 효율 개선

장지근,김봉렬 대한전자공학회 1984 전자공학회지 Vol.21 No.1

비저항이 10Ω-cm, 두께가 13∼15mi1인 <111> oriented, p형 Si기판을 이용하여 N+PP+ BSF 전지와 에미터 영역이 N+N 고저 접합으로 이루어진 N+NPP+ HELEBSF(high low emitter bach surface field) 전지를 설계 제작하였다. 접합형 태양전지의 에미터 영역에서 고저 접합구조가 효율 개선에 미치는 영향을 검토하기 위해 HLEBSF 전지의 N영역을 제외하고는 같은 마스크와 동시 공정을 통해 N+PP-전지와 N+NPP+ 전지의 가영역에서 물리적 파라미터들(불순물 농도, 두께)을 동일하게 만들었다. 100mW/㎠의 인공조명에서 측정한 결과 N+PP+ 전지들의 전면적 (유효 수광면적) 평균 변환효율이 10.94%(12.16%)이었고, N+NPP+ 전지들의 평균 변환효율은 12.07% (13.41%)로 나타났다. N+NPP+ 전지의 효율개선은 N+N-고저 접합 에미터 구조가 N+ 에미터 영역에서 나타나는 heavy doping effects를 제거함으로써 에미터 재결합 전류의 증가를 억제하고 나아가 개방전압(Voc)과 단락전류(Ish)의 값을 증가시켜 준 결과로 볼 수 있다. N+NPP+ HLEBSF (high low emitter back surface field) solar cells which have N+N high low junction in the emitter as well as N+PP+ BSF cells were designed and fabricated by using <111> oriented P type Si wafers with the resistivity of 10$\Omega$/$\textrm{cm}^2$ and the thickness of 13-15 mil. Physical parameters (impurity concentration, thickness) at each region of N+PP+ and N+NPP+ cell were made equally through same masks and simultaneous process except N region of HLEBSF cell to investigate the high low emitter junction effect for efficiency improvement. Under the light intensity of 100 mW/$\textrm{cm}^2$, total area (active area) conversion efficiency were typically 10.94% (12.16%) for N+PP+ BSF cells and 12.07% (13.41%) for N+N PP+ cells. Efficiency improvement of N+NPP+ cell which has high low emitter Junction structure is resulted from the suppression of emitter recombination current and the increasement of open circuit voltage (Voc) and short circuit current (Ish) by removing heavy doping effects occurring in N+ emitter region.

게이트 제어형 실리콘 PN다이오드의 항복특성에 관한 연구

張志根 단국대학교 1986 論文集 Vol.20 No.-

Gate controlled silicon p-n diodes are fabricated on the <111> oriented P type Si wafer with the resistivity of 8~20Ω-cm and the thickness of 13~15 mils by integrated process technology. The effect of gate voltage on the breakdown charcteristics of these devices is studied experimentally and theoretical1y on the basis of N-grounded method. It is shown that the breakdown voltage can be modulated over a wide range and that it tends to saturation at a maximum and at a minimum value as the gate voltage is varied. The breakdown voltage is found to be lowly saturated at 31[V] above V_G=40[V]and highly saturated at 68[V]below VG=-40[V]. Between these two extremes, the breakdown voltage is found to be approximately given by BV=mV_G+constant, with m=-1. The breakdown voltage vs gate voltage characteristics is explained in terms of bulk, surface and field induced junction breakdown in relation to surface field effects of p-n junction and the formation of field induced junction under inversion layer.

BSF Si 태양전지(N^+PP^+)의 특성고찰과 효율증대 방안

張志根 단국대학교 1983 論文集 Vol.17 No.-

Ti/SiO_2/Si 구조상에 Pt(h00) 박막의 결정성장

장지근,김민영,방용익 단국대학교 신소재기술연구소 1998 신소재 Vol.8 No.-

DC 마그네트론 스퍼터링 방식으로 Ti/SiO_2/Si 구조 위에 P5(200) 박막을 배향 성장시키기 위해 증착조건(스퍼터링 가스의 종류와 압력, 기판의 온도)과 후속열처리(RTA, furnace annealing)에 따른 Pt 박막의 전기·결정학적 특성을 조사하였다. 실험결과, 20 mTorr의 Ar+O_2(20%)의 혼합가스 분위기에서 기판온도를 500℃로 유지하여 Pt박막을 증착하고 600℃에서 30초간 급속 열처리를 실시한 경우, 90% 이상의 결정 배향도를 갖는 Pt(200) 박막을 제작할 수 있었다. 제작된 Pt(200) 박막은 30∼40 μΩ·cm의 낮은 전기저항율과 우수한 열적 안정성을 나타내었으며 600℃의 고온에서 장시간 열처리를 실시하여도 전기저항율이나 우선 배향성의 변화, 박막내 미세 결함 및 열적 응집현상 등이 발생되지 않았다. To grow the [200] oriented Pt film on the Ti/SiO_2/Si structure by DC magnetron sputtering, electrical and crystallographic properties of Pt thin films were investigated according to deposition conditions like sputtering gases, pressures and substrate temperatures with post annealing treatments of RTA and furnace annealing. As the result of experiments, Pt(200) films under conditions of the mixed gas atmosphere of Ar+O_2(20%), the pressure of 20 mTorr and the substrate temperature of 500℃ and by performing rapid thermal annealing at 600℃ for 30 sec. Fabricated Pt(200) thin films exhibited low electrical resistivities of 30∼40 μΩ·cm and good thermal stabilities showing no change of the resistivity and preferred orientation and without microstructural defects and agglomeration after long term annealing in a furnace of 600℃.

Si 기판상에 DC 마그네트론 스퍼터링방식에 의한 Pt(200) 박막의 배향성장

장지근,김민영,박용익,장호정,Jang, Ji-Geun,Kim, Min-Yeong,Park, Yong-Ik,Jang, Ho-Jeong 한국재료학회 1999 한국재료학회지 Vol.9 No.3

DC마그네트론 스퍼터링 방식으로 $Ti/SiO_2$/Si 구조 위에 Pt(200) 박막을 배향 성장시키기 위해 증착조건(스퍼터링 가스의 종류와 압력, 기판의 온도)과 후속열처리(RTA, Furnace annealing)에 따른 Pt 박막의 전기, 결정학적 특성을 조사하였다. 실험결과, 20mTorr의 Ar+O$_2$(20%)의 혼합가스 분위기에서 기판온도를 $500^{\circ}C$로 유지하여 Pt박막을 증착하고$ 600^{\circ}C$에서 30초간 급속 열처리를 실시한 경우, 90% 이상의 결정 배항도를 갖는 Pt(200) 박막을 제작할 수 있었다. 제작된 Pt(200) 박막은 $30~40\mu$Ω.cm의 낮은 전기저항율과 우수한 열적 안정성을 나타내었으며$ 600^{\circ}C$의 고온에서 장시간 열처리를 실시하여도 전기저항율이나 우선 배향성의 변화, 박막내 미세 결함 및 열적응집현상 등이 발생되지 않았다.