Doppler Correction Algorithm using Correlation

노석호 安東大學校 工業技術硏究所 1999 공업기술연구논문집 Vol.6 No.1

도플러 천이는 통신시스템의 반송주파수에 비례하기 때문에, 위성통신링크상의 RF주파수은 큰 도플러 천이의 영향을 받아 반송파 주파수가 천이되고, 이로 인하여 수신단의 성능이 크게 저하된다. 따라서 위성통신 링크상에서 발생하는 도플러 천이에 의한 성능저하를 최소한으로 줄일 수 있는 도플러 천이 보방 알고리즘의 개발이 요구된다. 본 논문에서는 도플러 천이를 보상하기 위하여, 송신 데이터와 수신 데이터간의 상관을 계산하여, 그 값을 이용하여 VCO를 조절하는 자동주파수제어 도플러 보상법을 제안하였다. 제안한 알고리즘의 성능을 검토하기 위하여 VSAT hub 시스템에 적응하여 시험한 결과 유효한 알고리즘임을 확인하였다. This paper describes the development of the algorithm for Doppler correction at the hub station in VSAT system. The correlation method was considered. Extensive use was made of computer simulation tools. The correlation method has been found suitable algorithm for Doppler correction in the VSAT hub station.

5W급 고전력용 LED 드라이버 IC 개발

노석호,신건순 금오공과대학교 2008 論文集 Vol.29 No.-

Now our country to LED Application such as channel lighting many companies development progress but LED power failure kind control skill and IC development skill involved with this are weak. Specially, Application is composing each other different dimming system particularly and it is very difficult situation to use in general lighting company. Also, skill dependence is inevitable situation because is depending necessary all standard abroad in power failure kind control. Therefore, it becomes judgment to guide oversea foreign market and description through internal security of LED power failure kind control skill and IC development skill involved with this. Existent internal LED lighting system is using general power failure kind IC. But, this is course that is encountering exclusive possession by most foreign semi-conductor company. Therefore, by being equal or secure skill in high position with world standard, is judged to be used in market that led on LED control module whole.

Link Budget Calculation for the Koreasat Satellite

노석호 安東大學校 工業技術硏究所 1998 공업기술연구논문집 Vol.5 No.1

The Koreasat digital DBS system link analysis was described. The DBS system transmitter station is especially important than other earth station. Because DBS transmitter station will broadcast DBS signal to the million customers in Korea. So we have made transmitter station EIRP as high as we can to maximize uplink availability. The calculated C/N excess margin for the 99% worst month of the DBS link was 7.3dB for the clear sky and 1.5dB for the rainy sky. The measured uplink C/N is 5.4dB lower and downlink C/N is 4.8dB higher than the calculation. This is because of the parameter difference between the calculation and measurement like a TS EIRP, SAT EIRP and receiver ANT EIRP. The measured BER performance over the satellite was 1.1dB better than the threshold of the link budget.

Development of a New Automatic Fault Diagnosis System for Fine Pattern Transmission Lines

노석호,임재환,류지열 제어·로봇·시스템학회 2017 International Journal of Control, Automation, and Vol.15 No.5

This paper presents a new automatic fault diagnosis and detection system for fine pattern interconnects. It is verified by performance of the proposed system for COFs (chip-on-films) with width of less than 20 mm andpitch of less than 25 mm as fine pattern transmission lines. The proposed system detects and diagnoses variety offaults such as open, short, near open (mouse bite) and near short (soft short) after fabrication cycle of fine patterntransmission lines. This system consists of RF source, variable gain amplifier (VGA), multi-lead probe card, ACgenerator, Look-Up Table (LUT), signal processing block, and monitoring block. It also utilizes new techniquesto differentiate very small voltage changes due to the faults using VGA and programmable gain amplifier (PGA),and to detect barely detectable far-end near open and near short faults. The proposed system showed very low testoverhead and significantly high fault coverage as conventional test systems. It is expected that this system is aneffective alternative to decrease test overhead and increase fault coverage for the fine pattern transmission lines.

AHP를 이용한 농촌주민 삶의 질 지표의 중요도 설정

노석호,이한성,정원호 한국농촌계획학회 2022 농촌계획 Vol.28 No.1

This study aims to establish the indicator system of the quality of life of rural residents and to estimate the weights among criteria or sub-criteria that constitute the indicator system of the quality of life using AHP(Analytic Hierarchy Process) method. Indicator system consists of four criteria, that is, health care, eduction & culture, living environment, and income and jobs. Each criterion include three sub-criteria that make up corresponding criterion. The results show that income and jobs was most highly evaluated among the four criteria. It was followed by health care, living environment, and eduction & culture. Among the total 12 sub-criteria, annual income was most highly evaluated, followed by medical service level, job satisfaction, and public transportation environment in terms of global weight which was deduced from expert questionnaire survey. This study implies that rural development policy needs to focus on increasing rural residents’ income by creating good quality occupations and increasing the level of medical services, and expanding public transportation services in rural areas. This study has failed to collect local residents’ opinions regarding their quality of life in spite of the efforts to reflect the opinions from various expert groups, which is the limitation of this study.

차량 추돌 방지 레이더용 24-GHz 전력 증폭기 설계

노석호,류지열,Noh, Seok-Ho,Ryu, Jee-Youl 한국정보통신학회 2016 한국정보통신학회논문지 Vol.20 No.1

본 논문에서는 차량 추돌 방지 단거리 레이더용 24-GHz CMOS 고주파 전력 증폭기 (RF power amplifier)를 제안한다. 이러한 회로는 클래스-A 모드 증폭기로서 단간 (inter-stages) 공액 정합 (conjugate matching) 회로를 가진 공통-소스 단으로 구성되어 있다. 제안한 회로는 TSMC $0.13-{\mu}m$ 혼성신호/고주파 CMOS 공정 ($f_T/f_{MAX}=120/140GHz$)으로 설계하였다. 2볼트 전원전압에서 동작하며, 저전압 전원에서도 높은 전력 이득, 낮은 삽입 손실 및 낮은 음지수를 가지도록 설계되어 있다. 전체 칩 면적을 줄이기 위해 넓은 면적을 차지하는 실제 인덕터 대신 전송선(transmission line)을 이용하였다. 설계한 CMOS 고주파 전력 증폭기는 최근 발표된 연구결과에 비해 $0.1mm^2$의 가장 작은 칩 크기, 40mW의 가장 적은 소비전력, 26.5dB의 가장 높은 전력이득, 19.2dBm의 가장 높은 포화 출력 전력 및 17.2%의 가장 높은 최대 전력부가 효율 특성을 보였다. In this paper, we propose 24-GHz CMOS radio frequency (RF) power amplifier for short-range automotive collision avoidance radars. This circuit contains common source stage with inter-stages conjugate matching circuit as a class-A mode amplifier. The proposed circuit is designed using TSMC $0.13-{\mu}m$ mixed signal/RF CMOS process ($f_T/f_{MAX}=120/140GHz$). It operates at the supply voltage of 2V, and it is designed to have high power gain, low insertion loss and low noise figure in the low supply voltage. To reduce total chip area, the circuit used transmission lines instead of the bulky real inductor. The designed CMOS power amplifier showed the smallest chip size of $0.1mm^2$, the lowest power consumption of 40mW, the highest power gain of 26.5dB, the highest saturated output power of 19.2dBm and the highest maximum power-added efficiency of 17.2% as compared to recently reported results.

㎓-대역 저잡음 증폭기의 선형성 향상에 관한 연구

노석호(Seok-Ho Noh),류지열(Jee-Youl Ryu) 한국정보기술학회 2019 한국정보기술학회논문지 Vol.17 No.9

This paper presents study results for linearity improvement of ㎓-band low noise amplifier(LNA). To verify this linearity improvement, we fabricated the proposed circuit using TSMC 0.13-㎛ mixed signal/RF BiCMOS SiGe process(f<SUB>T</SUB>/f<SUB>MAX</SUB>=120/140㎓). The fabricated amplifier also operates at the power supply of 1.2V, and it is implemented to operate at the frequency of 2.4㎓. We used the MOS-BJT derivative superposition(MBDS) technique to achieve high linearity. To reduce the second-order nonlinear transconductance coefficient related to the enhancement of linearity, the LC tank circuit is paralleled in the emitter of bipolar transistor. We also connected two fee㏈ack capacitances in the base-to-collector and gate-to-drain capacitances to adjust the phase of third-order nonlinear coefficients of bipolar and MOS transistors, respectively. The proposed LNA showed excellent IIP3 of 26.7㏈m compared to recently published results.

차량 추돌 예방 레이더를 위한 24GHz CMOS 믹서 설계

노석호(Seok-Ho Noh),류지열(Jee-Youl Ryu) 한국정보기술학회 2014 한국정보기술학회논문지 Vol.12 No.11

In this paper, we propose 24GHz CMOS mixer for automotive collision avoidance radar. This circuit operates at the operation frequency of 24GHz, and it contains Gilbert cell type. The proposed circuit is also designed using TSMC 0.13μm mixed signal/RF CMOS process (f<SUB>T</SUB>/f<SUB>MAX</SUB>=120/140GHz). The circuit operates at the supply voltage of 2V, and it is designed to have high conversion gain, low conversion loss and low noise figure in the low supply voltage. To make excellent isolation characteristics between LO and RF, we designed double-balanced topology. The mixer used transmission lines instead of the real inductor to reduce total chip area and to get accurate line phase shift. The proposed circuit showed the highest conversion gain of 10.96dB, IIP3 of 7.6dBm and FoM (figure of merit) of 14.4dB, and the smallest power consumption of 5mW and chip size of 0.2×0.2m² as compared to recently reported research results. It also showed excellent noise figure of 12.9dB, input return loss (S11) of -43.64dB, and LO-RF isolation (S12) of -49.3dB as conventional research results, respectively.

아날로그 집적회로 결함 검출을 위한 새로운 검사방식

노석호(Seok-Ho Noh),류지열(Jee-Youl Ryu) 한국정보기술학회 2014 한국정보기술학회논문지 Vol.12 No.12

This paper presents a new test technique for fault detection of analog integrated circuits. This test technique can detect various faults such as open, short, near open and near short from the fabrication step of analog integrated circuits. It is also capable of diagnosing specific faults from transistors, resistors, inductors, capacitors in integrated circuits, etc.. This technique discriminates defective or defect-free cases by measuring transient step current of power supply and output response, respectively. To verify performance of the proposed test technique, we designed wideband CMOS operational amplifier as a typical analog integrated circuits. It is designed using TSMC 0.18μm CMOS technology. The proposed technique showed an excellent fault detection capability of more than 99% from total 80 samples for various faults such as open, short, near open and near short. This test technique is inexpensive and simple.

저전력 24㎓ 저잡음 증폭기 개발

노석호(Seok-Ho Noh),류지열(Jee-Youl Ryu) 한국정보기술학회 2020 한국정보기술학회논문지 Vol.18 No.8

This paper presents low-power 24-㎓ CMOS low noise amplifier(LNA). This circuit is implemented using 65-㎚ RF CMOS process(f<SUB>T</SUB>/f<SUB>MAX</SUB>=70/90㎓). The low noise amplifier is powered by 1.2V supply, and it is designed to operate at the operation frequency of 24㎓. The proposed LNA has cascode scheme to decrease power consumption and to increase voltage gain, and it is optimized to minimize noise figure. This circuit is applicable to 5th generation(5G) mobile communication network and automotive collision avoidance radar system. The proposed circuit showed the lowest power consumption of 4.2㎽ and the smallest die area of 0.5×0.5㎟. This circuit also showed high voltage gain of approximately 31㏈, low noise figure of 2.71㏈, but it need to improve linearity for IIP3 of 2.8㏈m as compared to conventional research results.