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RISS 인기검색어
- 검색키워드
- 저자 : Senthil Kumaran Mahadevan (검색결과 3 건)
- 무료
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Simplified logical modulator for the reduction of common mode voltage in alternating current drives
Kullan, Murugesan,Mahadevan, Senthil Kumaran,Johnson, Anitha Roseline The Korean Institute of Power Electronics 2021 JOURNAL OF POWER ELECTRONICS Vol.21 No.11
This paper proposes the reduction of common mode voltage (CMV) magnitude using a simplified logical modulator (SLM). This modulator uses the ideas of space vectors to detect and eliminate the high common mode vectors produced by carrier phase-shifted sine pulse width modulation generator. The proposed SLM has an inherent ability to eliminate the CMV spikes due to dead time, but it introduces short circuit vectors (SCVs). This issue is addressed by designing an SCV eliminator (SCVE). The performance of the SLM-SCVE is validated through simulations. The proposed SLM-SCVE is implemented using MATLAB-Xilinx system generator interface in Spartan 3E-FPGA and tested in a prototype hardware. The proposed SLM-SCVE proves to be a simple and reliable solution for the reduction of CMV in industrial application because finite number of logic gates is used.
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Roseline, Johnson Anitha,Vijayenthiran, Subramanian,V., Rajini,Mahadevan, Senthil Kumaran The Korean Institute of Power Electronics 2015 JOURNAL OF POWER ELECTRONICS Vol.15 No.3
The hybrid cascaded multilevel inverter (HCMLI) is a popular converter topology that is being increasingly used in high power medium voltage drives. The intricacy of the control technique for a HCMLI increases with the number of levels and due to fluctuating dc voltages. This paper presents a novel offline quadrant search based space vector modulation technique to synthesize a sinusoidal output from a dispersed pattern of voltage vectors due to different voltages in the auxiliary unit. Such an investigation has never been reported in the literature and it is being attempted for the first time. The method suggested distributes the voltage vectors for a reduced total harmonic distortion at minimal computation. In addition, the proposed algorithm determines the maximum modulation index in the linear modulation range in order to synthesize a sinusoidal output for both normal and abnormal vector patterns. It is better suited for a wide range of practical applications. It is particularly well suited for renewable source fed inverters which utilize large capacitor banks to maintain the dc link, which are prone to such slow fluctuations. The proposed quadrant search space vector modulation technique is simulated using MATLAB/SIMULINK and implemented using a Nexys-2 Spartan-3E FPGA for a developed prototype.
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Johnson Anitha Roseline,Subramanian Vijayenthiran,Rajini V,Senthil Kumaran Mahadevan 전력전자학회 2015 JOURNAL OF POWER ELECTRONICS Vol.15 No.3
The hybrid cascaded multilevel inverter (HCMLI) is a popular converter topology that is being increasingly used in high power medium voltage drives. The intricacy of the control technique for a HCMLI increases with the number of levels and due to fluctuating dc voltages. This paper presents a novel offline quadrant search based space vector modulation technique to synthesize a sinusoidal output from a dispersed pattern of voltage vectors due to different voltages in the auxiliary unit. Such an investigation has never been reported in the literature and it is being attempted for the first time. The method suggested distributes the voltage vectors for a reduced total harmonic distortion at minimal computation. In addition, the proposed algorithm determines the maximum modulation index in the linear modulation range in order to synthesize a sinusoidal output for both normal and abnormal vector patterns. It is better suited for a wide range of practical applications. It is particularly well suited for renewable source fed inverters which utilize large capacitor banks to maintain the dc link, which are prone to such slow fluctuations. The proposed quadrant search space vector modulation technique is simulated using MATLAB/SIMULINK and implemented using a Nexys-2 Spartan-3E FPGA for a developed prototype.
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