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RISS 인기검색어
- 검색키워드
- 저자 : Gapyeol Park (검색결과 3 건)
- 무료
- 기관 내 무료
- 유료
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Youngwoo Kim,Jonghyun Cho,Kyungjun Cho,Junyong Park,Subin Kim,Dong-Hyun Kim,Gapyeol Park,Sitaraman, Srikrishna,Raj, Pulugurtha Markondeya,Tummala, Rao R.,Joungho Kim IEEE 2017 IEEE transactions on components, packaging, and ma Vol.7 No.9
<P>In this paper, we propose glass-interposer (GI) electromagnetic bandgap (EBG) structure with defected ground plane (DGP) for efficient and broadband suppression of power/ground noise coupling. We designed, fabricated, measured, and analyzed a GI-EBG structure with DGP for the first time. The proposed GI-EBG structure with DGP is thoroughly analyzed using the dispersion characteristics and estimated stopband edges, f(L) and f(U). We experimentally verified that the proposed GI-EBG structure with DGP achieved power/ground noise isolation bandgap (below -30 dB) between f(L) of 5.7 GHz and f(U) of 11 GHz. Estimation of f(L) and f(U) using dispersion analysis, full 3-D electromagnetic (EM) simulation results, and measurement results achieved good correlation. Effectiveness of the proposed GI-EBG structure with DGP on suppression of the power/ground noise coupling to high-speed through glass via (TGV) channel is verified with 3-D EM simulation. As a result, the proposed EBG structure successfully and efficiently suppressed the power/ground noise coupling and improved the eye diagram of the TGV channel. Lastly, we embedded thin alumina film in the proposed EBG structure and achieved even broader power/ground noise suppression between 2.1 and 14.7 GHz.</P>
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Cho, Kyungjun,Kim, Youngwoo,Lee, Hyunsuk,Song, Jinwook,Park, Junyong,Lee, Seongsoo,Kim, Subin,Park, Gapyeol,Son, Kyungjune,Kim, Joungho IEEE 2019 IEEE transactions on components, packaging, and ma Vol.9 No.1
<P>In this paper, we, for the first time, designed and analyzed differential high-speed serial links of the silicon interposer including differential through-silicon-via (TSV) channels for a high-bandwidth memory (HBM) graphic module. The meshed ground plane and various parameters were considered in designing the silicon interposer. In addition, superior designs were proposed to improve signal integrity (SI) for the differential channels in the redistribution layer, TSVs, and the meshed ground. SI of the silicon interposer was successfully analyzed, and the corresponding results were verified based on a full 3-D electromagnetic solver and circuit simulations. A number of RLGC parameters were extracted and calculated, then adopted to verify the simulation results. The simulation results for the differential characteristic impedance and insertion loss were compared with those of the equivalent circuit. A mixed-mode conversion matrix was utilized to analyze differential-mode transmission. Moreover, a model for differential TSV channels was proposed to precisely analyze the electrical characteristics. The eye-diagram simulation was conducted to evaluate SI of the proposed designs in terms of an eye-opening voltage and timing jitter. The eye-opening voltage of the proposed design was 0.594 V, which is 45.69% of a peak-to-peak voltage of the assumed peripheral component interconnect (PCI)-express 4.0 interfaces. It is expected that the analysis and design methodologies of differential high-speed serial links for a silicon interposer could be widely adopted in the semiconductor industry.</P>
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Miniaturized and high-performance RF packages with ultra-thin glass substrates
Kim, Min Suk,Pulugurtha, Markondeya Raj,Kim, Youngwoo,Park, Gapyeol,Cho, Kyungjun,Smet, Vanessa,Sundaram, Venky,Kim, Joungho,Tummala, Rao Elsevier 2018 Microelectronics Journal Vol.77 No.-
<P><B>Abstract</B></P> <P>Advanced RF packages are demonstrate with active (low-noise amplifier, RF switch) and passive integration in ultra-thin 3D glass packages with miniaturization and enhanced performance. The novelty of this RF packages is three-fold: 1) Ultra-thin 100 μm glass, 2) Double-side thinfilm RF circuits interconnected with Through-Package Vias (TPVs), and 3) Direct assembly of the glass-core package to the board with Land Grid Array (LGA) connections. An innovative double-via process, starting from prefabricated vias in bare glass, polymer filling and via drilling, is utilized for a robust and high-yield substrate fabrication process. Scalable and low-cost panel laminate processes are utilized to form the RF circuits on the build-up layers. The performance benefits are demonstrated through interconnect loss, impedance match, electrical gain and noise figure measurements. Compared to existing RF substrates, the glass substrates show 2.5X miniaturization in substrate thickness with extensibility to thinner substrates.</P>
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