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金玧廷,鄭均樂 弘益大學校 科學技術硏究所 1996 科學技術硏究論文集 Vol.7 No.2
An imoportant step in VLSI physical design is to determine the orientation of modules after floorplanning. After modules are placed according to some placement algorithm, circuit performance and routability can be affected by either flipping modules about their vertical and/or horizontal axes of symmetry or rotating modules while keeping the module placement fixed. MFA algorithm exhibits the rapid convergence of the neural networks while preserving the solution quality afforded by simulated annealing. In this paper, we have implemented 3 versions of Meanfield Annealing Algorithms for the problem of minimizing total wire length by flipping modules and compared the solution and execution time.