Monolithic integration of micro-LEDs and IGZO TFTs and its extension to hybrid 3D pixel integration

다국어 초록 (Multilingual Abstract)

Micro-LED displays have attracted considerable attention for advanced display applications owing to their high brightness, fast response time, low power consumption, and excellent reliability[1]-[3].
However, conventional micro-LED display fabrication relies on the separate fabrication of a micro-LED frontplane and a driving backplane, followed by transfer and bonding processes. As the pixel pitch decreases, securing sufficient alignment margin, transfer yield, and bonding reliability becomes increasingly challenging[4],[5].
To mitigate these limitations, this study proposes a monolithic integration（MI） device structure in which an oxide thin-film transistor（TFT） is stacked directly on a micro-LED. To select a suitable driving TFT, AZO and IGZO TFTs were compared in terms of electrical characteristics and process compatibility. AZO TFTs exhibited relatively high drain current but could not be properly turned off by the gate bias and showed insufficient compatibility with the photolithography process. In contrast, optimized IGZO TFTs exhibited low off-current, clear switching behavior, a maximum field-effect mobility of 22.81 cm2/V·s, and an on/off current ratio on the order of 106. Based on these results, IGZO was selected as the oxide TFT active layer for micro-LED driving.
An MI device in which a micro-LED and an IGZO TFT were monolithically integrated was subsequently fabricated on a GaN-based LED epitaxial substrate. The fabricated device demonstrated that both the driving current and emission intensity of the micro-LED could be controlled by the gate bias applied to the IGZO TFT. These results confirmed that the IGZO TFT could serve as the driving device within the monolithically integrated structure.
As a subsequent strategy for extending the MI device toward a backplane-integrated display architecture, hybrid 3D integration was proposed. In this approach, the MI device, in which a micro-LED and an IGZO TFT are monolithically integrated, is bonded and vertically interconnected with a backplane pixel circuit to form a 2T1C pixel architecture. The electrical operation of the MI device fabricated on a GaN-on-Si（111） wafer, the formation of an anchor- and tether-supported suspended structure through anisotropic undercut etching of the Si（111） substrate, and the subsequent assembly process were experimentally investigated to evaluate the feasibility of the key unit processes required for the proposed integration approach.
This study presents a sequential integration strategy that extends the monolithic integration of a micro-LED and an IGZO TFT to a hybrid 3D pixel architecture incorporating a backplane pixel circuit. The proposed approach establishes a process framework for high-resolution, full- color micro-LED displays and free-form displays requiring integration on diverse substrate platforms.

목차 (Table of Contents)

• Abstract 1
• Chapter 1. Introduction 3
• Chapter 2. Micro-LED Display 6
• 2.1 Micro-LED Display characteristics 6
• 2.2 Micro-LED Display driving Schemes and pixel circuits 9
• 2.3 Conventional Micro LED Display manufacturing process and transfer challenges 13
• 2.4 Monolithic Integration technology 16
• Chapter 3. Oxide Thin-Film Transistors as Driving transistors for Monolithic Integrated devices 19
• 3.1 Driving transistors requirements for MI devices 19
• 3.2 Evaluation of AZO and IGZO TFTs 21
• 3.2.1 Experiments 21
• 3.2.2 Results and Discussions 24
• 3.3 Optimization of IGZO TFTs for micro-LED driving 29
• 3.3.1 Experiments 29
• 3.3.2 Results and Discussions 31
• Chapter 4. Monolithic Integration of micro-LED with oxide TFT 38
• 4.1 Proposed Monolithic integrated device structure 38
• 4.2 Experiments 40
• 4.3 Results and Discussions 43
• Chapter 5. Hybrid 3D integration: Vertical Heterogeneous Integration of MI devices and Pixel Circuits via a Simultaneous Wafer Release and Assembly Process 47
• 5.1 Extension Strategy for MI-Based Micro-LED Display Architecture and Hybrid 3D Integration Process Concept 47
• 5.2 Experiments 50
• 5.3 Feasibility Demonstration of Unit Processes 55
• Chapter 6. Conclusion 66
• References 68
• 국문 요약 71