Interface Dipole Modulation for Tunable Threshold Voltage in IGZO/HZO FeFETs = IGZO/HZO FeFET 문턱전압 제어를 위한 계면 쌍극자 엔지니어링

다국어 초록 (Multilingual Abstract)

To overcome the physical limitations of traditional complementary metal oxide silicon (CMOS) technology and the von Neumann bottleneck, ferroelectric field-effect transistors (FeFETs) that simultaneously provide non-volatile memory and computing functions are attracting significant attention. In particular, FeFET arrays with various threshold voltages (Vth) are essential for implementing next-generation neuromorphic computing and in-memory computing systems. This study presents a novel approach to precisely control Vth in indium gallium zinc oxide (IGZO)/ hafnium zirconium oxide (HZO) FeFETs fabricated on silicon substrates through interface dipole engineering. The IGZO channel provides ultralow leakage current and excellent gate controllability, while the HZO ferroelectric exhibits high remnant polarization and fast switching speed even in sub-10 nm thin films. Both materials can ensure full compatibility with existing CMOS fabrication lines. Interface dipoles with opposite polarities were formed using Al2O3 and La2O3 as dipole sources, and their effects were systematically investigated through a three-stage sequential analysis of metal-ferroelectric-silicon capacitor (MFSCAP), metal-ferroelectric-metal capacitor (MFMCAP), and FeFET structures. In MFSCAP structures, Al-dipole and La-dipole exhibited flatband voltage shifts of +0.1V and -0.2V, respectively, demonstrating bidirectional Vth control. MFMCAP analysis revealed that interface dipoles effectively modulated the coercive field (Ec) while maintaining the ferroelectric properties of HZO. La-dipole reduced Ec by 30% to 1.92 MV/cm, facilitating domain switching, but showed a low remnant polarization saturation ratio of 59% at ±4V due to domain pinning. However, complete polarization switching was achieved at ±6V. In FeFET characterization, Al-dipole achieved a positive Vth shift of +0.8V and a wide memory window of 2.7V, but increased interface traps (+143%) deteriorated the subthreshold swing to 139.5 mV/decade and reduced mobility to 3.40 cm2/V⋅s. In contrast, La-dipole achieved a negative Vth shift of -0.9V along with remarkable performance improvements through oxygen vacancy passivation. Trap density decreased by 23%, improving subthreshold swing by 9.3% to 85.1 mV/decade and dramatically increasing mobility by 144.7% to 11.65 cm2/V⋅s. This study demonstrates that interface dipole engineering enables the fabrication of FeFETs with various Vth combinations in a single process. Al-dipole is optimized for multi-level memory applications, while La-dipole is ideal for low-power, high-performance logic applications, providing high design flexibility for neuromorphic computing and in-memory computing system implementations.

국문 초록 (Abstract)

전통적인 complementary metal oxide silicon (CMOS) 기술의 물리적 한계와 폰노이만 병목 현상을 극복하기 위해, 비휘발성 메모리와 연산 기능을 동시에 제공하는 ferroelectric field-effect transistor(FeFET)가 주목받고 있다. 특히 차세대 neuromorphic computing 및 in-memory computing 구현을 위해서는 다양한 문턱전압(Vth)을 가진 FeFET array가 필수적이다. 본 연구는 interface dipole engineering을 통해 silicon 기판 위에 집적된 indium gallium zinc oxide (IGZO)/ hafnium zirconium oxide (HZO) FeFET의 Vth를 정밀 제어하는 새로운 접근법을 제시한다. IGZO 채널은 극저 누설전류와 우수한 게이트 제어성을 제공하며, HZO 강유전체는 10 nm 이하의 박막에서도 높은 잔류 분극과 빠른 스위칭 속도를 나타낸다. 두 재료 모두 기존 CMOS fab과 완전히 호환 가능하다. Al2O3와 La2O3를 dipole source로 사용하여 반대 극성의 interface dipole을 형성하였으며, metal-ferroelectric-silicon (MFSCAP), metal-ferroelectric-metal capacitor (MFMCAP), FeFET의 3단계 순차적 분석을 통해 dipole 효과를 체계적으로 규명하였다. MFSCAP에서 Al-dipole과 La-dipole은 각각 +0.1V, -0.2V의 flatband voltage shift를 나타내어 양방향 Vth 제어를 입증하였다. MFMCAP 분석 결과, interface dipole은 HZO의 강유전 특성을 유지하면서 항전계(Ec)를 효과적으로 변조하였다. La-dipole은 Ec를 1.92 MV/cm로 30% 감소시켜 domain switching을 용이하게 하였으나, domain pinning으로 인해 ±4V에서는 59%의 낮은 잔류 분극 saturation ratio를 보였다. 그러나 ±6 V 조건에서는 완전한 분극 전환이 달성되었다. FeFET 특성 평가에서 Al-dipole은 +0.8V의 positive Vth shift와 2.7V의 넓은 memory window를 달성하였으나, interface trap 증가(+143%)로 subthreshold swing이 139.5 mV/decade로 악화되고 mobility가 3.40 cm2/V⋅s로 감소하였다. 반면 La-dipole은 -0.9V의 negative Vth shift와 함께 oxygen vacancy passivation을 통한 획기적인 성능 향상을 달성하였다. Trap density가 23% 감소하여 subthreshold swing이 85.1 mV/decade로 9.3% 개선되고, mobility가 11.65 cm2/V⋅s로 144.7% 대폭 증가하였다. 본 연구는 단일 공정에서 interface dipole engineering을 통해 다양한 Vth 조합의 FeFET을 구현할 수 있음을 입증하였다. Al-dipole은 multi-level memory에, La-dipole은 저전력 고성능 logic에 최적화되어 neuromorphic computing 및 in-memory computing 시스템 설계에 높은 자유도를 제공할 것으로 기대된다.

목차 (Table of Contents)

• 1. Introduction 1
• 1.1. Research Motivation 1
• 1.2 Theoretical Background 4
• 1.2.1 Hafnium Zirconium Oxide (HZO) 4
• 1.2.2 Indium Gallium Zinc Oxide (IGZO) 5
• 1.2.3 Ferroelectric Field-Effect-Transistor (FeFET) 6
• 1.2.4 Interface Dipole Engineering 8
• 1.3 Objectives of the Research 9
• 2. Experimental 16
• 2.1 Fabrication 16
• 2.1.1 MFSCAP Fabrication 16
• 2.1.2 MFMCAP Fabrication 17
• 2.1.3 IGZO/HZO FeFET Fabrication 19
• 2.2 Characterization Methods 22
• 2.2.1 Electrical Measurements 22
• 2.2.2 Physical Analysis 23
• 3. Results and Discussion 24
• 3.1 Interface Dipole Optimization in MFSCAP 24
• 3.1.1 Optimized Dipole conditions 24
• 3.1.2 Flatband Voltage Modulation by Interface Dipoles 25
• 3.1.3 Dielectric parameters of Dipole induced MFSCAP 26
• 3.2 Ferroelectric Crystallization Optimization in MFMCAP 31
• 3.2.1. Crystal Structure and Temperature Optimization 31
• 3.2.2 Microstructure Analysis of MFMCAP 36
• 3.2.3 Ferroelectric Properties of Dipole induced MFMCAP 38
• 3.3. Interface Dipole Modulation and Performance in FeFET 43
• 3.3.1 Threshold Voltage Shift and Modulation 43
• 3.3.2 Memory Window Characteristics 50
• 3.3.3. Device Performance Parameters 56
• 3.4 Reliability Analysis 61
• 3.4.1 HZO Ferroelectric Endurance Characteristics 61
• 3.4.2 Retention Characteristics 62
• 4. Conclusion 69
• 4.1 Experimental Results and Prospects 69
• 4.2 Future Improvements 72
• References 75
• Abstract in Korean 87