Fabrication and characterization of high-reliability AlGaN/GaN MIS-HEMTs using LPCVD SiO2 gate insulators

다국어 초록 (Multilingual Abstract)

Silicon power devices face intrinsic limits in breakdown field, switching loss, and thermal stability at high voltage and frequency. In GaN HEMTs, conventional Schottky gates mitigate these constraints only partially due to gate leakage, premature breakdown, and surface/interface trapping; high-k dielectrics reduce leakage but introduce new trade-offs among leakage, breakdown strength, fixed charge, and traps. This work employs a TEOS-LPCVD SiO2 gate dielectric and demonstrates that gas-ambient control (O2/N2) alone can finely tune film composition/density and interface quality, thereby mapping the performance space of AlGaN/GaN MIS-HEMTs without resorting to high-k. Using TEOS 40 sccm and a target thickness of ≈ 20 nm, we sweep O2 (0/160/320 sccm with N2 fixed at 160 sccm) and N2 (0/160/320 sccm with O2 fixed at 160 sccm), and evaluate DC I–V (output/transfer, Ron, SS), gm–VGS, gate-leakage, Hall ns/μ, and conductance spectroscopy Gp/ω to extract effective Dit and Cbt. Increasing O2 suppresses gate leakage by several decades and improves On/Off ratio, whereas over-oxidation (320sccm) raises interface/border traps, degrading μ, SS, and gm and reducing Imax. The power-device optimum is O2 = 160 sccm (e.g., Imax = 149.65 mA/mm, Ron = 4.634 × 10−2 Ω·mm, SS = 241 mV/dec), while the ultra-low-leakage/switching optimum is O2 = 320 sccm (On/Off ≈ 2.49 × 107). Increasing N2 yields monotonic Ron reduction, Imax increase (42.05 → 196.31 mA/mm), SS improvement (308 → 184 mV/dec), a positive Vth shift (− 5.44 → − 3.76 V), and higher gm,max. Conductance analysis shows effective Dit minimized at N2 = 160 sccm, while Cbt continues to decrease up to N2 = 320 sccm; at the highest N2, slight leakage upturn keeps On/Off ratio at ~ 106. We further assess reliability across LPCVD-SiO2 ambients by quantifying off-state breakdown voltage (BV), high-temperature gate bias (HTGB)-induced threshold shift and gate leakage (VGS = 8 V, 150 °C), and time-dependent dielectric breakdown (TDDB). A balanced oxidation condition (TEOS 40 sccm, O2 160 sccm, N2 160 sccm) shows the strongest robustness—BV ≈ 612 V together with the smallest ΔVth and IGS under HTGB and the longest TDDB lifetime—implicating reduced interface/border trapping while maintaining adequate film density. These results define a reliability-optimal SiO2 process window for the present MIS-HEMTs. For practicality, we fabricated a GaN-LED–MIS-HEMT hybrid pixel via flip-chip bonding. The single pixel exhibits continuous luminance control with turn-on near VGS ≈ − 1 V and visually saturating brightness for VGS ≥ 3 V; a 4×4 array achieved ≈ 50 % light-on yield, with apparent low-voltage leakage traced to the LED path. Overall, SiO2-LPCVD with controlled O2/N2 enables precise placement along the drive-capability vs. leakage/reliability trade-off without high-k dielectrics, offering a practical process window for reliable GaN power/RF devices and Micro LED display drivers.

목차 (Table of Contents)

• Chapter Ⅰ. Introduction 3
• Chapter Ⅱ. Research Background 5
• 2.1 Material properties 5
• 2.1.1 GaN semiconductors 5
• 2.1.2 Spontaneous & Piezoelectric polarization 8
• 2.2 AlGaN/GaN Heterojunction 12
• 2.2.1 2DEG formation 12
• 2.2.2 AlGaN/GaN High Electron Mobility Transistors 17
• 2.3 Overview of AlGaN/GaN MIS-HEMTs 22
• Chapter Ⅲ. Experiments on Metal/SiO2/AlGaN/GaN MIS-HEMTs 26
• 3.1 Fabrication 27
• 3.2 Results and Discussions 39
• Chapter Ⅳ. Applications — MIS-HEMTs for GaN-LED Displays 57
• Chapter Ⅴ. Conclusion 62
• Reference 65
• 국문 초록 69