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      Monolithic 3D Integration of NMOSFETs and Hysteresis-Free Top-Gated Single-Walled Carbon Nanotube FETs for Micro-LED Driver Applications

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      https://www.riss.kr/link?id=T17371099

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      다국어 초록 (Multilingual Abstract) kakao i 다국어 번역

      Monolithic 3D (M3D) integration technology offers a path to ultra-high resolution, low latency, and energy-efficient circuits required for interactive VR/AR displays. This study demonstrates the implementation of M3D complementary logic by vertically integrating hysteresis-free p-type top-gated single-walled carbon nanotube (SWNT) field-effect transistors (FETs) and n-type metal-oxide FETs (NMOSFETs). Hysteresis suppression is achieved through spin-on glass (SOG) and HfO₂ encapsulation, enabling stable and reliable SWNT operation. The resulting CMOS inverters exhibit low power consumption, high reliability, and reduced photocurrent due to the top-gated structure critical for high-resolution active-matrix display backplanes. The feasibility of this approach is validated by directly driving red and blue micro-LEDs with the complementary inverter scheme within a 5 V supply, confirming full pixel-level functionality through monolithic integration. This scalable M3D strategy meets stringent power and pixel-density requirements, advancing heterogeneous channel material integration for next-generation AR/VR display technologies.
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      Monolithic 3D (M3D) integration technology offers a path to ultra-high resolution, low latency, and energy-efficient circuits required for interactive VR/AR displays. This study demonstrates the implementation of M3D complementary logic by vertically ...

      Monolithic 3D (M3D) integration technology offers a path to ultra-high resolution, low latency, and energy-efficient circuits required for interactive VR/AR displays. This study demonstrates the implementation of M3D complementary logic by vertically integrating hysteresis-free p-type top-gated single-walled carbon nanotube (SWNT) field-effect transistors (FETs) and n-type metal-oxide FETs (NMOSFETs). Hysteresis suppression is achieved through spin-on glass (SOG) and HfO₂ encapsulation, enabling stable and reliable SWNT operation. The resulting CMOS inverters exhibit low power consumption, high reliability, and reduced photocurrent due to the top-gated structure critical for high-resolution active-matrix display backplanes. The feasibility of this approach is validated by directly driving red and blue micro-LEDs with the complementary inverter scheme within a 5 V supply, confirming full pixel-level functionality through monolithic integration. This scalable M3D strategy meets stringent power and pixel-density requirements, advancing heterogeneous channel material integration for next-generation AR/VR display technologies.

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      목차 (Table of Contents)

      • Abstract i
      • Table of Contents ii
      • List of Tables iii
      • List of Figures iv
      • Chapter 1 Introduction 1
      • Abstract i
      • Table of Contents ii
      • List of Tables iii
      • List of Figures iv
      • Chapter 1 Introduction 1
      • 1.1 Background of Micro-LED technology 1
      • 1.2 Advantages of M3D in Micro-LED Backplanes 3
      • 1.3 Compatibility of SWNTs in monolithic 3D (M3D) integration 7
      • Chapter 2 Experimental Details 9
      • 2.1 Device Fabrication Process 9
      • Chapter 3 Results and Discussions 12
      • 3.1 Device Characterization 12
      • 3.2 Complementary Inverter 26
      • 3.3 Display Applications 31
      • Chapter 4 Conclusion 33
      • References 34
      • 국문초록 39
      • Acknowledgements 40
      • Curriculum Vitae 42
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